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Dive into the research topics where Jae-chul Lee is active.

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Featured researches published by Jae-chul Lee.


Applied Physics Letters | 2009

Amorphous hafnium-indium-zinc oxide semiconductor thin film transistors

Chang-Jung Kim; Sang-Wook Kim; Je-Hun Lee; Jin-Seong Park; Sun-Il Kim; Jaechul Park; Eunha Lee; Jae-chul Lee; Young-soo Park; Joo Han Kim; Sung Tae Shin; U-In Chung

We developed amorphous hafnium-indium-zinc oxide (HIZO) thin films as oxide semiconductors and investigated the films electrically and physically. Adding of hafnium (Hf) element can suppress growing the columnar structure and drastically decrease the carrier concentration and hall mobility in HIZO films. The thin film transistors (TFTs) with amorphous HIZO active channel exhibit good electrical properties with field effect mobility of around 10 cm2/Vs, S of 0.23 V/decade, and high Ion/off ratio of over 108, enough to operate the next electronic devices. In particular, under bias-temperature stress test, the HIZO TFTs with 0.3 mol % (Hf content) showed only 0.46 V shift in threshold voltage, compared with 3.25 V shift in HIZO TFT (0.1 mol %). The Hf ions may play a key role to improve the instability of TFTs due to high oxygen bonding ability. Therefore, the amorphous HIZO semiconductor will be a prominent candidate as an operation device for large area electronic applications.


international electron devices meeting | 2008

High performance oxide thin film transistors with double active layers

Sun Il Kim; Chang Jung Kim; Jae Chul Park; I-hun Song; Sang-Wook Kim; Huaxiang Yin; Eunha Lee; Jae-chul Lee; Young-soo Park

We successfully integrated the high performance oxide thin film transistors with double active layers. The active layer is composed of IZO (or ITO) and GIZO layers. The TFT with ITO/GIZO double active layer shows a high mobility of 104 cm2/V.sec, the acceptable threshold voltage of about 0.5 V and the low Vth shift less than 1 V under voltage stress. These are very promising results for applications in driving large area AMOLED and AMLCD display.


international soc design conference | 2013

Power-aware task scheduling for big.LITTLE mobile processor

Kisoo Yu; Donghee Han; Changhwan Youn; Seungkon Hwang; Jae-chul Lee

The heterogeneous multiprocessor architecture is more energy-efficient than homogeneous multiprocessor architecture. It can be possible, however, when the operating system schedules tasks to appropriate processors based on their architectural properties. In mobile world, ARM revealed their big.LITTLE architecture to satisfy two conflicting requirements: the powerful performance and the energy-efficient processing. Heterogeneous Multi Processing for big.LITTLE processor works by assigning each task by its nature. If a task consumes proportionally high CPU resource rather than others, then HMP scheduler assigns this task to big core, and in opposite case, HMP scheduler assigns to LITTLE core. By observing each task during runtime, if a tasks characteristic is changed, HMP scheduler will move the task to the opposite core. Some power saving techniques like, DVFS (Dynamic Voltage & Frequency Scaling), Dynamic hot plug, change the performance of system to fit in current required performance level. So, the CPU frequency and the number of online cores can be changed during runtime. If HMP scheduler assigns a task to big core without this power information which is changed by these power saving techniques, HMP scheduler would use big core involuntary. In this paper, we evaluate a power-aware task scheduling for the big.LITTLE mobile processor and demonstrate power awareness in task scheduler consumes less power still staying on same performance in mobile processor. And we list up some possible power information that can improve HPM scheduler for further works.


international electron devices meeting | 2007

New Approach for Passivation of Ga 2 O 3 -In 2 O 3 -ZnO Thin Film Transistors

Sun Il Kim; Chang Jung Kim; Jae Chul Park; I-hun Song; Dong Hun Kang; Hyuck Lim; Sang-Wook Kim; Eunha Lee; Jae-chul Lee; Young-soo Park

We successfully integrate the Ga2O3-In2O3-ZnO (GIZO) thin film transistors (TFTs) under conventional dry etching and passivation process using a novel capping layer. The passivated TFT shows a superior stability performance which has the threshold voltage shift of less than 0.6 V at 3 uA and 60degC in 100 hours. This is very promising results for applications in driving TFT for large area active matrix OLED display.


SID Symposium Digest of Technical Papers | 2009

64.1: Distinguished Paper: A Reduced Voltage Differential Signaling (RVDS) Interface for Chip-On-Glass TFT-LCD Applications

Jung Pil Lim; Ji-Hoon Kim; Dong Hoon Baek; Jae Youl Lee; Jae-chul Lee; Young Min Choi; Jae Wan Park; Keun Ho Ryu; Jong Hoon Hong; Tae Kyung Kim; Woo Sung Lee; Paul Kim; Jong Seon Kim; Yoon Kyung Choi; Myung Hee Lee

Reduced Voltage Differential Signaling (RVDS) is a new interface for TFT-LCD panel with Chip-On-Glass (COG) structure which has point-to-point topology and voltage mode differential signaling scheme. The display source driver IC with RVDS interface performs higher data rate up to 500Mbps, lower current consumption of 2.2mA, and lower EMI compared with conventional current mode interface.


Archive | 2008

METHOD OF COMPENSATING FOR KICK-BACK VOLTAGE AND LIQUID CRYSTAL DISPLAY USING THE SAME

Jae-chul Lee; Jong-Seon Kim


Archive | 1993

Clip for coupling inner shield with frame

Jae-chul Lee


Archive | 2007

DITHERING SYSTEM AND METHOD FOR USE IN IMAGE PROCESSING

Chang-Min Kim; Jae-chul Lee; Jong-Seon Kim


Archive | 2005

Method of forming silicon oxynitride layer in semiconductor device and apparatus of forming the same

Young-Sub You; Cheol-Kyu Yang; Woong Lee; Jae-chul Lee; Hun-Hyeoung Leam


Archive | 1997

Methods of forming capacitor electrodes including a capacitor electrode etch

Hee-seok Kim; Jae-chul Lee; Hyun-woo Lim; Jae-hyong Lee

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