Jae Gwang Um

Light/negative bias stress instabilities in indium gallium zinc oxide thin film transistors explained by creation of a double donor

The analysis of current-voltage (I-V) and capacitance-voltage (C-V) characteristics for amorphous indium gallium zinc oxide Thin film transistors as a function of active layer thickness shows that negative bias under illumination stress (NBIS) is quantitatively explained by creation of a bulk double donor, with a shallow singly ionized state e(0/+) > EC-0.073 eV and a deep doubly ionized state e(++/+) < EC-0.3 eV. The gap density of states, extracted from the capacitance-voltage curves, shows a broad peak between EC–E = 0.3 eV and 1.0 eV, which increases in height with NBIS stress time and corresponds to the broadened transition energy between singly and doubly ionized states. We propose that the center responsible is an oxygen vacancy and that the presence of a stable singly ionized state, necessary to explain our experimental results, could be due to the defect environment provided by the amorphous network.

Increase of interface and bulk density of states in amorphous-indium-gallium-zinc-oxide thin-film transistors with negative-bias-under-illumination-stress time

The evolution with time of interface trap density and bulk density of states in amorphous-indium-gallium-zinc-oxide thin-film transistors (TFTs), for negative-bias-under-illumination-stress (NBIS), is traced. Based on the combined analysis of TFT current-voltage and capacitance-voltage characteristics, position of Fermi energy, flat band voltage, interface trap density, and gap state density per unit energy are investigated as function of NBIS time and applied gate voltage. These key parameters help to identify the degradation phenomena responsible for the negative threshold voltage shift caused by NBIS. In particular, the interface trap density becomes more positive; from 0.03 × 1011/cm2 to 0.65 × 1011/cm2, while the gap trap density per unit energy also increases after NBIS, supporting defect creation in the bulk and build-up of positive charge at the gate insulator/active-layer interface as the mechanism responsible for NBIS instability.

Mechanism of positive bias stress-assisted recovery in amorphous-indium-gallium-zinc-oxide thin-film transistors from negative bias under illumination stress

We have analyzed the effect of applying positive bias stress (PBS) to amorphous-indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) immediately after applying negative bias under illumination stress (NBIS). By monitoring TFT current-voltage and capacitance-voltage characteristics, we found that PBS facilitates the recovery process. NBIS results in positive charge trapping at the active-layer/gate-insulator interface and the formation of shallow donors in the bulk a-IGZO when neutral oxygen vacancies are ionized by hole capture. In addition to the release of trapped positive charges from the active-layer/gate-insulator interface during the PBS-assisted recovery, ionized oxygen vacancies are neutralized by electron capture and relax back to their original deep levels—well below EF.

Continuous-wave operation of a 5.2 μm quantum-cascade laser up to 210 K

Continuous-wave operation of a 5.2 μm-type I quantum-cascade laser with more than 5 mW of output power is reported at a heat sink temperature of 210 K (−63 °C). This temperature is within the range obtainable with thermal-electric coolers. The device was mounted epi-side down on a copper submount and exhibited a thermal resistance of ∼10 K/W at 210 K. Using the experimentally determined values for T0=136 K, J0=535 A/cm2 and Vop=8.1 V and the above thermal resistance, the maximum theoretical operating temperature was found to be 212 K, in close agreement with experiment. Thermal simulations show that by improving the device design and heat sinking, thermal resistance can be reduced to 8.8 K/W and the maximum cw operating temperature can be increased to 230 K.

Remarkable changes in interface O vacancy and metal-oxide bonds in amorphous indium-gallium-zinc-oxide thin-film transistors by long time annealing at 250 °C

We have studied the effect of long time post-fabrication annealing on negative bias illumination stress (NBIS) of amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film-transistors. Annealing for 100 h at 250 °C increased the field effect mobility from 14.7 cm2/V s to 17.9 cm2/V s and reduced the NBIS instability remarkably. Using X-ray photoelectron spectroscopy, the oxygen vacancy and OH were found to exist at the interfaces of a-IGZO with top and bottom SiO2. Long time annealing helps to decrease the vacancy concentration and increase the metal-oxygen bonds at the interfaces; this leads to increase in the free carrier concentrations in a-IGZO and field-effect mobility. X-ray reflectivity measurement indicated the increment of a-IGZO film density of 5.63 g cm−3 to 5.83 g cm−3 (3.4% increase) by 100 h annealing at 250 °C. The increase in film density reveals the decrease of O vacancy concentration and reduction of weak metal-oxygen bonds in a-IGZO, which substantially helps to improve the NBIS stability.

Effect of SiO 2 and SiO 2 /SiN x Passivation on the Stability of Amorphous Indium-Gallium Zinc-Oxide Thin-Film Transistors Under High Humidity

We studied the environmental stability of amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) with single-layer (SiO2) and bilayer (SiO2/SiNx) passivation under high-humidity (80%) storage. During the 30 days of investigation, all single-layer passivated TFTs showed negative turn-ON voltage shifts (AVON), the size of which increased with storing time. The negative A VON is attributed to donor generation inside the active a-IGZO caused by the diffusion of ambient hydrogen/water molecules passing through the SiO2 passivation layer. The X-ray photoelectron spectroscopy depth profile for the SiO2 passivated structures confirms that the concentration of oxygen vacancies, which is initially larger at the a-IGZO/SiO2 interface, compared with the bulk a-IGZO, decreases after 30 days of storage under high humidity. This can be explained as the passivation of oxygen vacancies by diffused hydrogen. On the other hand, all bilayer passivated TFTs showed good air stability at room temperature and high humidity (80%).

Highly Robust Neutral Plane Oxide TFTs Withstanding 0.25 mm Bending Radius for Stretchable Electronics

Advancements in thin-film transistor (TFT) technology have extended to electronics that can withstand extreme bending or even folding. Although the use of ultrathin plastic substrates has achieved considerable advancement towards this end, free-standing ultrathin plastics inevitably suffer from mechanical instability and are very difficult to handle during TFT fabrication. Here, in addition to the use of a 1.5 μm-thick polyimide (PI) substrate, a 1.5 μm-thick PI film is also deposited on top of the TFT devices to ensure that the devices are located at the neutral plane of the two PI films for high folding stability. For mechanical support during TFT fabrication up to the deposition of the top PI film, the PI substrate is spin coated on top of a carrier glass that is coated with a mixture of carbon nanotubes (CNTs) and graphene oxide (GO). The mixture of CNT and GO facilitates mechanical detachment of the neutral plane (NP) TFTs from the carrier glass before they are transferred to a polydimethylsiloxane (PDMS) substrate as islands. Being located in the neutral bending plane, the NP TFT can be transferred to the PDMS without performance degradation and exhibit excellent mechanical stability after stretching the PDMS substrate up to a 25% elastic elongation.

Defect generation in amorphous-indium-gallium-zinc-oxide thin-film transistors by positive bias stress at elevated temperature

We report on the generation and characterization of a hump in the transfer characteristics of amorphous indium gallium zinc-oxide thin-film transistors by positive bias temperature stress. The hump depends strongly on the gate bias stress at 100 °C. Due to the hump, the positive shift of the transfer characteristic in deep depletion is always smaller that in accumulation. Since, the latter shift is twice the former, with very good correlation, we conclude that the effect is due to creation of a double acceptor, likely to be a cation vacancy. Our results indicate that these defects are located near the gate insulator/active layer interface, rather than in the bulk. Migration of donor defects from the interface towards the bulk may also occur under PBST at 100 °C.

Analysis of Improved Performance Under Negative Bias Illumination Stress of Dual Gate Driving a-IGZO TFT by TCAD Simulation

We report the numerical simulation of the effect of a dual gate (DG) TFT structure operating under dual gate driving on improving negative bias illumination stress (NBIS) of amorphous indium gallium zinc oxide thin-film transistors (a-IGZO TFTs). With respect to the transfer characteristics of a-IGZO TFTs, we show a larger negative threshold voltage shift (ΔVTH) with increasing a-IGZO active layer thickness. This trend is confirmed by TCAD simulation, where the initial transfer curve is plotted under varying a-IGZO thickness keeping a constant density of states. Under varying a-IGZO thickness, TCAD simulation results confirm TFTs under DG driving shows significantly less ΔVTH shift under NBIS compared with that of single gate (SG) driving TFTs. Under 10 K seconds of NBIS, TCAD simulation results show the increase in donor-like states (NGD) by 5.25 × 1017 cm-3 eV-1 and acceptor-like states (NGA) by 7.5 × 1016 cm-3 eV-1.

Channel length dependence of negative-bias-illumination-stress in amorphous-indium-gallium-zinc-oxide thin-film transistors

We have investigated the dependence of Negative-Bias-illumination-Stress (NBIS) upon channel length, in amorphous-indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). The negative shift of the transfer characteristic associated with NBIS decreases for increasing channel length and is practically suppressed in devices with L = 100-μm. The effect is consistent with creation of donor defects, mainly in the channel regions adjacent to source and drain contacts. Excellent agreement with experiment has been obtained by an analytical treatment, approximating the distribution of donors in the active layer by a double exponential with characteristic length LD ∼ Ln ∼ 10-μm, the latter being the electron diffusion length. The model also shows that a device with a non-uniform doping distribution along the active layer is in all equivalent, at low drain voltages, to a device with the same doping averaged over the active layer length. These results highlight a new aspect of the NBIS mechanism, that is, the ...