Jae-Hyun Lee

Wafer-Scale Growth of Single-Crystal Monolayer Graphene on Reusable Hydrogen-Terminated Germanium

Smoothing Graphene Several methods have been reported for the growth of monolayer graphene into areas large enough for integration into silicon electronics. However, the electronic properties of the graphene are often degraded by grain boundaries and wrinkles. Lee et al. (p. 286, published online 3 April) showed that flat, single crystals of monolayer graphene can be grown by chemical-vapor deposition on silicon wafers covered by a germanium layer that aligns the grains. The graphene can be dry-transferred to other substrates, and the germanium layer can be reused for further growth cycles. Wafer-scale single-crystal monolayer graphene can be repeatedly grown on a hydrogen-terminated germanium (110) surface. The uniform growth of single-crystal graphene over wafer-scale areas remains a challenge in the commercial-level manufacturability of various electronic, photonic, mechanical, and other devices based on graphene. Here, we describe wafer-scale growth of wrinkle-free single-crystal monolayer graphene on silicon wafer using a hydrogen-terminated germanium buffer layer. The anisotropic twofold symmetry of the germanium (110) surface allowed unidirectional alignment of multiple seeds, which were merged to uniform single-crystal graphene with predefined orientation. Furthermore, the weak interaction between graphene and underlying hydrogen-terminated germanium surface enabled the facile etch-free dry transfer of graphene and the recycling of the germanium substrate for continual graphene growth.

Catalyst-free growth of single-crystal silicon and germanium nanowires.

We report metal-free synthesis of high-density single-crystal elementary semiconductor nanowires with tunable electrical conductivities and systematic diameter control with narrow size distributions. Single-crystal silicon and germanium nanowires were synthesized by nucleation on nanocrystalline seeds and subsequent one-dimensional anisotropic growth without using external catalyst. Systematic control of the diameters with tight distribution and tunable doping concentration were realized by adjusting the growth conditions, such as growth temperature and ratio of precursor partial pressures. We also demonstrated both n-type and ambipolar field effect transistors using our undoped and phosphorus-doped metal-free silicon nanowires, respectively. This growth approach offers a method to eliminate potential metal catalyst contamination and thus could serve as an important point for further developing nanowire nanoelectronic devices for applications.

Epitaxial Growth of a Single-Crystal Hybridized Boron Nitride and Graphene Layer on a Wide-Band Gap Semiconductor

Vertical and lateral heterogeneous structures of two-dimensional (2D) materials have paved the way for pioneering studies on the physics and applications of 2D materials. A hybridized hexagonal boron nitride (h-BN) and graphene lateral structure, a heterogeneous 2D structure, has been fabricated on single-crystal metals or metal foils by chemical vapor deposition (CVD). However, once fabricated on metals, the h-BN/graphene lateral structures require an additional transfer process for device applications, as reported for CVD graphene grown on metal foils. Here, we demonstrate that a single-crystal h-BN/graphene lateral structure can be epitaxially grown on a wide-gap semiconductor, SiC(0001). First, a single-crystal h-BN layer with the same orientation as bulk SiC was grown on a Si-terminated SiC substrate at 850 °C using borazine molecules. Second, when heated above 1150 °C in vacuum, the h-BN layer was partially removed and, subsequently, replaced with graphene domains. Interestingly, these graphene domains possess the same orientation as the h-BN layer, resulting in a single-crystal h-BN/graphene lateral structure on a whole sample area. For temperatures above 1600 °C, the single-crystal h-BN layer was completely replaced by the single-crystal graphene layer. The crystalline structure, electronic band structure, and atomic structure of the h-BN/graphene lateral structure were studied by using low energy electron diffraction, angle-resolved photoemission spectroscopy, and scanning tunneling microscopy, respectively. The h-BN/graphene lateral structure fabricated on a wide-gap semiconductor substrate can be directly applied to devices without a further transfer process, as reported for epitaxial graphene on a SiC substrate.

Electrochemical growth of vertically aligned ZnO nanorod arrays on oxidized bi-layer graphene electrode

Vertically aligned ZnO nanorod arrays were directly grown on flexible and transparent oxidized bi-layer graphene electrodes by seedless electrochemical deposition. Oxidized defects on the graphene surface induce epitaxial growth of highly dense single crystal ZnO nanorods. The diameter, length as well as morphology of the nanorods can be effectively controlled by adjusting reaction conditions.

Tunable bandgap of a single layer graphene doped by the manganese oxide using the electrochemical doping

We studied the control of the bandgap energy of graphene by doping manganese oxide nanoparticles using an electrochemical method. The manganese oxide doping into the graphene was a main role for the bandgap opening and the defect generation was an effective method to increase the density of Mn doping on the graphene. The measured bandgap increased and finally saturated at 0.256u2009eV as the concentration of manganese oxide nanoparticles increased. The bandgap energies were 0.22, 0.244, 0.250, and 0.256u2009eV at the applied voltage of 0.5, 1.0, 1.5, and 2.0u2009V, respectively. In addition, the defect generation by the plasma treatment resulted in improved formations of the bandgap energy up to 0.4u2009eV. The combination of the manganese oxide doping and the defect generation can enhance the bandgap energy effectively in the graphene. It is considered that the electrochemical doping technique is an effective way to control the bandgap energy of graphene.

Low-Programmable-Voltage Nonvolatile Memory Devices Based on Omega-shaped Gate Organic Ferroelectric P(VDF-TrFE) Field Effect Transistors Using p-type Silicon Nanowire Channels

A facile approach was demonstrated for fabricating high-performance nonvolatile memory devices based on ferroelectric-gate field effect transistors using a p-type Si nanowire coated with omega-shaped gate organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)). We overcame the interfacial layer problem by incorporating P(VDF-TrFE) as a ferroelectric gate using a low-temperature fabrication process. Our memory devices exhibited excellent memory characteristics with a low programming voltage of ±5xa0V, a large modulation in channel conductance between ON and OFF states exceeding 105, a long retention time greater than 3xa0×xa0104 s, and a high endurance of over 105 programming cycles while maintaining an ION/IOFF ratio higher than 102.

Tunable threshold voltage of an n-type Si nanowire ferroelectric-gate field effect transistor for high-performance nonvolatile memory applications

We successfully fabricated ferroelectric-gate field effect transistor (FEFET)-based nonvolatile memory devices using an n-type Si nanowire coated with omega-shaped-gate organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) via a low-temperature fabrication process. Our FEFET memory devices with controllable threshold voltage via adjustment of the doping concentration exhibit excellent memory characteristics with ultra-low ON state power dissipation (≤3 nW), a large modulation in channel conductance between the ON and OFF states exceeding 10(5), a long retention time of over 3 × 10(4) s and a high endurance of over 10(5) programming cycles whilst maintaining an I ON/I OFF ratio higher than 10(3). This result may be promising for next-generation nonvolatile memory on flexible substrate applications.

Fabrication of vertically aligned Si nanowires on Si (100) substrates utilizing metal-assisted etching

Vertically aligned Si nanowires were fabricated utilizing a metal-assisted chemical etching scheme using a thin anodic aluminum oxide (AAO) template formed on (100) Si substrate. The diameter and length of the obtained Si nanowires were about 55 and 340 nm, respectively, when the thickness of the AAO template was about 600 nm. The diameters and shapes of the Si nanowires were determined by the hole size and shape of the Ag mesh on the AAO template. In addition, the lengths of the vertical Si nanowires depended on both the AAO thickness and the Ag film thickness.

Reliability enhancement of germanium nanowires using graphene as a protective layer: aspect of thermal stability.

We synthesized thermally stable graphene-covered Ge (Ge@G) nanowires and applied them in field emission devices. Vertically aligned Ge@G nanowires were prepared by sequential growth of the Ge nanowires and graphene shells in a single chamber. As a result of the thermal treatment experiments, Ge@G nanowires were much more stable than pure Ge nanowires, maintaining their shape at high temperatures up to 850 °C. In addition, field emission devices based on the Ge@G nanowires clearly exhibited enhanced thermal reliability. Moreover, field emission characteristics yielded the highest field enhancement factor (∼2298) yet reported for this type of device, and also had low turn-on voltage. Our proposed approach for the application of graphene as a protective layer for a semiconductor nanowire is an efficient way to enhance the thermal reliability of nanomaterials.

Selective exfoliation of single-layer graphene from non-uniform graphene grown on Cu

Graphene growth on a copper surface via metal-catalyzed chemical vapor deposition has several advantages in terms of providing high-quality graphene with the potential for scale-up, but the product is usually inhomogeneous due to the inability to control the graphene layer growth. The non-uniform regions strongly affect the reliability of the graphene in practical electronic applications. Herein, we report a novel graphene transfer method that allows for the selective exfoliation of single-layer graphene from non-uniform graphene grown on a Cu foil. Differences in the interlayer bonding energy are exploited to mechanically separate only the top single-layer graphene and transfer this to an arbitrary substrate. The dry-transferred single-layer grapheme showed electrical characteristics that were more uniform than those of graphene transferred using conventional wet-etching transfer steps.