Jaeho Jung
Electronics and Telecommunications Research Institute
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Publication
Featured researches published by Jaeho Jung.
IEEE Photonics Technology Letters | 2014
Seunghyun Jang; Gweon-Do Jo; Jaeho Jung; Bonghyuk Park; Songcheol Hong
In this letter, we propose and demonstrate a digitized intermediate frequency (IF)-over-fiber transmission system based on the delta-sigma modulation technique as a means of digitizing an analog IF signal. Using a realized 130-nm CMOS, two-level third-order low-pass delta-sigma modulator (DSM) chip operating at 622.08 MHz, a 64-Quadrature Amplitude Modulation long-term evolution (LTE) 10-MHz signal at a 10-MHz IF frequency was successfully digitized, transported over an emulated digital fiber-optic link, and analyzed in terms of signal spectra, error vector magnitude (EVM), and constellations. The difference between power levels of the received LTE IF signal and quantization noise due to the developed DSM was larger than 45 dB, and an EVM value of 2.48% for the received LTE signal was obtained.
IEEE Microwave and Wireless Components Letters | 2013
Bonghyuk Park; Seunghyun Jang; Philip Ostrovskyy; Jaeho Jung
A fully integrated high voltage swing dual-band continuous-time bandpass delta-sigma modulator (CT BPDSM) with a high voltage swing and fabricated on a 0.25 μm SiGe BiCMOS is presented. The proposed CT BPDSM consists of a two-stage second-order resonator, a high speed comparator, multi-feedback current DACs, and a high voltage swing driver. The band selection is controlled using a capacitor bank, and fine frequency tuning is conducted by a varactor. At 883 and 955 MHz, the implemented BPDSM with a high voltage swing shows a peak SNR of 40.6 and 41.9 dB, and an error vector magnitude (EVM) of 5.48%, 3.48%, respectively. In addition, it has a differential output voltage swing of 1.55 Vp-p with a dc power consumption of 635.3 mW.
international conference on information and communication technology convergence | 2011
Seunghyun Jang; Kyoung-Pyo Ahn; Yoon-Ho Choi; Namsik Ryu; Bonghyuk Park; Seok-Bong Hyun; Jaeho Jung
A PWM based supply modulator on 180nm CMOS process for a high efficiency envelope tracking transmitter is designed. For high efficiency PWM operation, a ramp generator and a non-overlap clock generator are used. With an LTE 20MHz envelope signal with 7.6dB PAPR, the supply modulator shows efficiency of 72.2% with a resistive load of 2ohm.
international conference on advanced communication technology | 2017
Seunghyun Jang; Seok-Bong Hyun; Kwang-Seon Kim; Jaeho Jung; Bonghyuk Park
A CMOS continuous-time low-pass delta-sigma modulator (DSM) circuit that digitizes an analog mobile signal at 10 MHz intermediate frequency (IF) in a digital distributed antenna system (DAS) with IF-over-fiber scheme is designed in this paper. Detailed design processes and results from system to circuit levels are provided, which is helpful for the design of a DSM circuit for another digital DAS system based on DSM technique. The simulated peak signal-to-noise and distortion ratio of the designed DSM circuit was 49.4 dB, and high stop-band rejection ratios were achieved by exploiting the zero optimization technique in the noise transfer function of the designed DSM.
international topical meeting on microwave photonics | 2011
Seunghyun Jang; Bonghyuk Park; Jaeho Jung
We demonstrate an RSOA-based WDM-PON using a spectrally distorted 622-Mbps Sub-carrier Multiplexing (SCM) signal at 1200-MHz for downstream and a 622-Mbps Non Return to Zero (NRZ) signal for upstream. Even though the overall transmission bandwidth for the SCM signal with transceivers originally for 1.25-Gbps is only 810-MHz, a clear eye opening can be obtained using a spectral predistortion technique to compensate the signal quality deterioration above 810-MHz. With the predistorter, downstream signal sensitivity is improved up to 1.4-dB, leading to a wider range of the optical modulation index of the downstream SCM signal.
international symposium on radio-frequency integration technology | 2012
Bonghyuk Park; Seunghyun Jang; Jaeho Jung
A high voltage driver for Class-S power amplifier using SiGe BiCMOS process is presented in this paper. This high voltage driver is applied for making high voltage swing at the input of a power amplifier. The input of this driver is 600 mVp-p then the measured output is 780 mVp-p for single-ended. This driver dissipates 202 mW and it is suited for processing a bit stream of 2.4 Gbps and can be used as a driver stage for switching power amplifier. This high voltage driver is measured with fabricated delta-sigma modulator module.
Etri Journal | 2012
Nam-Sik Ryu; Jaeho Jung; Y. Jeong
Microwave and Optical Technology Letters | 2012
Bonghyuk Park; Jaeho Jung
international conference on advanced communication technology | 2012
Bonghyuk Park; Jaeho Jung
Microwave and Optical Technology Letters | 2012
Bonghyuk Park; Seunghyun Jang; Jaeho Jung