Jaime A. Plá

Equivalent-circuit modeling and verification of metal-ceramic packages for RF and microwave power transistors

A modeling procedure was developed to generate electrical package models for metal-ceramic packages. These models are capable of accounting for package effects associated with the package lead capacitance, the self and mutual inductances of the bond wires, and the coupling between the input and output of the package. A combination of full-wave electromagnetic simulation and equivalent-circuit model extraction allows accurate model generation and efficient circuit simulation. Measured S-parameters were used to verify the overall modeling methodology. It has been demonstrated that the package effects play an important role in the accurate prediction of the packaged transistor performance.

On the development of CAD techniques suitable for the design of high-power RF transistors

A full-wave modeling procedure was developed to simulate the package, bonding wires, and MOS capacitors used in the design of matching networks found within RF/microwave power transistors. The complex packaging environment was segmented into its constituent components and simulation techniques were developed for each component, as well as the inter-element coupling. An S-parameter test fixture and package was developed that permits measurements of these types of devices. The simulation and measurement procedures were used to model various circuits. Measured S-parameters and those obtained using the full-wave methodology were in good agreement. Simulation results using an inductance-only bonding-wire model were performed and differences between the S-parameters were observed. A detailed examination of the loss introduced by the matching network was performed and simulations and measurements matched closely.

Modeling techniques suitable for CAD-based design of internal matching networks of high-power RF/microwave transistors

A scalable and accurate simulation technique to be used for the computer-aided design (CAD) of matching networks employed within high-power RF transistors is presented. A novel measurement methodology is developed and utilized during the validation of the proposed analysis approach. Appropriate segmentation techniques were developed, which are consistent with the design approach of the high-power transistor, that take into account the overall complexity of the internal match of most modern RF high-power transistors, while preserving important electromagnetic interactions. By being able to properly decouple the linear portion of the overall packaged transistor model, an objective accuracy assessment via the comparison of measured versus simulated results of the internal matching network was accomplished. The level of accuracy obtained provides credence to the idea of a full CAD-driven design process of the internal match of high-power RF transistors.

Multiphysics Modeling of RF and Microwave High-Power Transistors

In this paper, we present a multiphysics approach for the simulation of high-power RF and microwave transistors, in which electromagnetic, thermal, and nonlinear transistor models are linked together within a harmonic-balance circuit simulator. This approach is used to analyze a laterally diffused metal-oxide-semiconductor (LDMOS) transistor that has a total gate width of 102 mm and operates at 2.14 GHz. The transistor die is placed in a metal-ceramic package, with bond-wire arrays connecting the die to the package leads. The effects of three different gate bond-pad layouts on the transistor efficiency are studied. Through plots of the spatial distributions of the drain efficiency and the time-domain currents and voltages across the die, we reveal for the first time unique interactions between the electromagnetic effects of the layout and the microwave behavior of the large-die LDMOS power field-effect transistor.

Multi-physics modeling of high-power microwave transistors

In this paper, we present a multi-physics approach for the simulation of high-power microwave transistors in which electromagnetic, thermal, and nonlinear transistor models are linked together within a harmonic-balance circuit simulator. This approach is used to analyze an LDMOS transistor operating at 2.14 GHz. The total gate width of the die is 102 mm, and the die is placed in a ceramic package and connected using bond-wire arrays at gate and drain. The effects of three different gate bond-pad metallization on the transistor efficiency are studied. Plots of the spatial distribution of the drain efficiency, and time-domain current and voltage provide a unique insight and understanding of the behaviours induced by the different bond-pads.

Load-Pull Measurements Using Modulated Signals

In this paper we report a method of applying digitally modulated signals to an RF power transistor in a load-pull system. This methodology ensures that the transistor experiences realistic thermal conditions, as well as realistic electrical conditions during test. The measured data is then sliced at constant value of CCDF enabling meaningful performance comparisons to be made between devices and technologies

Increased feedback due to package mounting

The affects of a discontinuity in the ground plane created by a difference in package and PCB thickness is examined. The overall circuit affects for a packaged transistor, in which its thickness is different than the PCB thickness, were simulated with commercially available electromagnetic 2D and 3D CAD tools. It was determined from the simulation results, that the discontinuity creates an inductive feedback path around the package that affects circuit performance. The affect of the ground step discontinuity and its associated strong dependency of the source inductance on FET devices common source gain have been highlighted.

Characterization and Modeling of LDMOS Power FETs for RF Power Amplifier Applications

In this review we present a measurement-based approach to the creation of a successful circuit model of a high-power RF FET. We describe some of the measurement challenges that we face in the characterization and validation of the FET model, and our approach to their solution. We also outline some of the simulation and modeling techniques that are used in the construction of the complete transistor model. The model itself is fully nonlinear, with a self-consistent dynamic electrothermal component, and includes the in-package matching and package components, which are derived from electro-magnetic simulations.