Basim H. Noori

Envelope-domain time series (ET) behavioral model of a Doherty RF power amplifier for system design

In this paper, we present an envelope-domain behavioral model of a high-power RF amplifier. In this modeling approach, we use the signal envelope information, and the behavioral model is generated using an established nonlinear time-series approach to create a time-domain model that operates in the envelope or signal domain. We have generated a model of a 200-W Doherty amplifier from measured IQ data taken using a wideband code-division multiple-access excitation; the amplifier was driven from the linear regime into saturation. The time-series model was created using a time-delay embedding identified from auto-mutual information analysis, and an artificial neural network was used to fit the multivariate transfer function. The model has been validated using measured and simulated data, and it has been used in the development of a system-level design of a digital pre-distorter

Systematic waveform engineering enabling high efficiency modes of operation in Si LDMOS at both L-band and S-band frequencies

This paper demonstrates that by robust waveform engineering it is possible for high power Si LDMOS to achieve very high efficiency at frequencies up to 2.1GHz. Class F amplifier operation was realized in a 5W LDMOS device by the successful application of robust waveform engineering procedures; undertaken at the current generator plane. The peak power added efficiency was found to be 78% at 0.9GHz and 77% at 2.1GHz. In both cases the RF waveforms were optimized in terms of the gate voltage, fundamental and harmonic impedances. The main difference at 2.1GHz was the change in fundamental impedance to a more reactive impedance to compensate for the dynamic device output capacitance. To the authors’ knowledge this is the highest efficiencies reported in the literature for Si LDMOS devices at 2.1GHz.

A new technique for decreasing the characterization time of passive load-pull tuners to maximize measurement throughput

This paper presents a technique for increasing the flexibility and the point density of passive load-pull tuner characterization coverage from a reduced measurement collection cycle. Interpolation methods are used to enhance the resolution of available tuner positions whilst greatly reducing the time required for data collection prior to useful load-pull measurement. Results are presented to demonstrate validation of the method, showing that the mathematical accuracy in the predicted tuner S-parameters is greater than the reported physical reproducibility of the tuners. The impact of the new technique on characterization time is demonstrated to yield a time saving of 80% - significantly increasing potential measurement throughput.

Peak Class F and Inverse Class F Drain Efficiencies Using Si LDMOS in a Limited Bandwidth Design

This paper compares two popular high power, high efficiency modes of operation, class F and inverse class F, and assesses the peak obtainable drain efficiencies when using Si LDMOS devices in a limited bandwidth design. Optimum class F and inverse class F conditions are presented using active harmonic load-pull measurements, and it was found that a higher drain efficiency was achieved in the class F configuration. This result is due to the limitations imposed by the soft voltage breakdown occurring due to the extended voltage swings inherent to inverse class F, as a consequence generating unwanted current content during the off cycle. This significantly reduces the peak measured efficiency using Si LDMOS devices when implementing an inverse class F design with a drain bias of 28 V. By reducing the drain bias to 18 V, to accommodate the voltage extension of inverse class F, it became possible to achieve peak measured efficiencies much closer to what theory predicted.

Improving loadpull measurement time by intelligent measurement interpolation and surface modeling techniques

In this paper we show how a thin-plate spline approximation can be used to generate a model of the measured response surface of a load-pull measurement over a much-reduced number of impedance points with no significant loss of accuracy. Further, interpolation between these model surfaces is possible, generating accurate drive-up characteristics. This has enabled accurate load-pull characterizations to be made in a fraction of the usual time.

A new technique for measuring the resonant behavior of power amplifier bias circuits

In this paper, a new and simple technique for measuring the magnitude and phase of low frequency components of bias circuits of power amplifiers is described. The Low-Frequency probe technique is implemented to determine modulation bandwidth and low frequency behaviors of power amplifiers and is also useful in determining the resonant frequencies of peripheral components causing potential instability and oscillations. The construction, set-up and calibration of the probe are discussed and supported by simulation and measurement results.

Improvements in high power LDMOS amplifier efficiency realized through the application of mixed-signal active loadpull

This paper presents the results of experimental large-signal characterization of a high power LDMOS amplifier using a mixed-signal active load pull system. The architecture of the system provides the freedom to present unique and independent reflection coefficients at multiple different frequencies. In this case the fundamental frequency, and the 2nd harmonic frequency were chosen, and the reflection coefficients presented to the output terminal of the transistor were captured at these two frequencies. A high voltage LDMOS power amplifier from Freescale Semiconductor was studied and the results will demonstrate that a distinct improvement in drain efficiency is realized through careful magnitude and phase selection of the reflection coefficient at the 2nd harmonic frequency while keeping the refection coefficient presented at the fundamental frequency at a constant optimized value.

Tuning range analysis of load pull measurement systems and impedance transforming networks

This paper studies, by mean of a mapping between the Smith chart and impedance plot, the different aspects that impact the tunable range at the DUT reference plane in a passive load pull measurement system. The utilization of an impedance transforming fixture is considered and the technique to choose the right transformation ratio is presented. Finally, a method to encircle the absolute tunable region of a load pull system is explained, considering the use of any impedance transforming network.

Load-Pull Measurements Using Modulated Signals

In this paper we report a method of applying digitally modulated signals to an RF power transistor in a load-pull system. This methodology ensures that the transistor experiences realistic thermal conditions, as well as realistic electrical conditions during test. The measured data is then sliced at constant value of CCDF enabling meaningful performance comparisons to be made between devices and technologies

Broadband Doherty Alternative with Filter Design Considerations

Doherty Amplifiers have become the standard architecture for high-efficiency cellular infrastructure applications, but most designs in production and in the field are limited in RF bandwidth (RFBW). Though it would be desirable to have Doherty amplifiers that operate over several adjacent bands, the importance of system efficiency under corrected linearity conditions has limited the deployment of wider-bandwidth Doherty amplifiers. This is particularly true where amplifiers require peak power capability of 500W or greater. This paper discusses filter design techniques related to RF power semiconductors targeted for wideband Doherty operations, as well as an amplifier technique that we call Frequency Selective Broadband (FSBB) Doherty design-this technique allows an alternative amplifier design covering multiple operating bands, without trade-offs in efficiency performance.