Jeffrey K. Jones

A 2-stage 150W 2.2GHz dual path LDMOS RF power amplifier for high efficiency applications

This paper presents a dual path 150W Silicon LDMOS 2-stage RF power amplifier designed for WCDMA at 2.2GHz. This device is capable of handling 2 times the UMTS band with flat RF performance. Under a 1 tone CW stimulus, this power amplifier delivers 150W with a power added efficiency of 47% and 29dB linear gain. A 2-stage compact Doherty amplifier constructed of an “in-package” 2 × 75W architecture is also presented, showing the versatility of this unique design. Using the device in a dual-path configuration, this Doherty circuit delivers an increase in drain efficiency of 9–12 points at 8 dB output backoff from P3dB compression, compared to a circuit using the device in a 150W, class-AB reference design.

Improvements in the instantaneous-bandwidth capability of RF Power Transistors using in-package high-k capacitors

RF Power Transistors, by design, have an upper limit to the input-signal bandwidth that can be amplified without incurring excessive distortion. The interaction between components internal to the pre-matched RF Power Transistor and on the external circuit board creates resonances at frequencies that are of the order of the modulation bandwidth of the signal. In this paper, we demonstrate a technique to improve the ‘video-bandwidth’ (VBW) capability of RF Power transistors using high-k capacitors. The improvement is more than 2 times a standard device. Also, digital predistortion performance is demonstrated with excellent results for narrow band as well as wideband signals (>50MHz). This capability enables wideband RF Power Amplifier Design for next generation systems demanding wider bandwidth / faster data rates.

A 120 watt, two-stage, LDMOS power amplifier IC at 1.8 GHz for GSM/EDGE applications

A 120 Watt LDMOS radio frequency integrated circuit (RFIC) targeting 1.8 GHz GSM, EDGE, and Evolved EDGE base station applications has been developed using state of the art design techniques and LDMOS technology. The amplifier was designed to cover the 1.8 GHz to 2 GHz GSM bands, and performs exceptionally well under both GSM and EDGE conditions. The two-stage, single-chip design exhibits 27 dB of gain and delivers 132 Watts of output power (1 dB compression; 27 Volt DC supply) with an associated PAE of 51%. Under EDGE modulation, at an average output power of 46 Watts, the EVM is less than 1.6 % and the spectral re-growth is −63 dBc and −78 dBc at 400, and 600 kHz offsets, respectively. This is the highest power, 1.8 to 2 GHz, two-stage RFIC in an over-molded plastic package, reported to date.

A 350W, 2GHz, 44% efficient LDMOS power amplifier design with capability to handle a wideband 65MHz envelope signal

In this paper we demonstrate high gain, high efficiency, single and balanced Doherty power amplifiers (PAs) that have the ability to transmit signals which occupy the full frequency band from 1930MHz–1995MHz. The PAs have been designed using a new generation of Freescale LDMOS power transistors [1], in which the drain side video-bandwidth (VBW) has been enhanced. For the first time we will show the ability of the PA to handle wideband envelope signals (> 80MHz) with excellent nonlinearity correction using Digital Pre-distortion (DPD). Narrow band as well as wideband DPD measurement results will be presented for single and balanced Doherty PAs including driver stages. These RF Doherty PAs are targeted for use in next generation wideband wireless communication systems.

Load-Pull Measurements Using Modulated Signals

In this paper we report a method of applying digitally modulated signals to an RF power transistor in a load-pull system. This methodology ensures that the transistor experiences realistic thermal conditions, as well as realistic electrical conditions during test. The measured data is then sliced at constant value of CCDF enabling meaningful performance comparisons to be made between devices and technologies

Broadband Doherty Alternative with Filter Design Considerations

Doherty Amplifiers have become the standard architecture for high-efficiency cellular infrastructure applications, but most designs in production and in the field are limited in RF bandwidth (RFBW). Though it would be desirable to have Doherty amplifiers that operate over several adjacent bands, the importance of system efficiency under corrected linearity conditions has limited the deployment of wider-bandwidth Doherty amplifiers. This is particularly true where amplifiers require peak power capability of 500W or greater. This paper discusses filter design techniques related to RF power semiconductors targeted for wideband Doherty operations, as well as an amplifier technique that we call Frequency Selective Broadband (FSBB) Doherty design-this technique allows an alternative amplifier design covering multiple operating bands, without trade-offs in efficiency performance.

High power integration for RF infrastructure power amplifiers

This paper presents techniques used in integration for high-power RF semiconductor products and their use in wireless infrastructure power amplifiers. Integrated single and multi-stage devices are discussed, as well as PA architecture comparisons and benefits for class AB, and high efficiency amplifiers. Manufacturing advantages and disadvantages of traditional discrete, versus various types of integrated semiconductor devices are compared for both ground-based and tower-mounted amplifier applications.