James A. McCall

Jitter Amplification Characterization of Passive Clock Channels at 6.4 and 9.6 Gb/s

Jitter amplification characteristics of different forwarded clock channels at 6.4 and 9.6 Gb/s are illustrated with model correlations. The effect illustrates the need for quarter rate clocking at higher speed, in lossy serial links

Proposal for BER based specifications for DDR4

We present a proposal for a statistical approach to DRAM DDR electrical specifications to improve analysis accuracy and specification methods, improving the predictability for the higher DDR4 data rates.

Non-Ideal Frequency Dependent Loss In Realistic PCB Transmission Lines

Digital signaling frequencies are approaching the GHz range for a variety of CPU, memory and peripheral interconnect schemes. The portions of timing budgets allocated to chip-to-chip interfaces are becoming concomitantly smaller, making accurate high-frequency characterization of physical layer components critical to robust HVM designs. At GHz frequencies the primary contributor to the physical layer timing budget is inter-symbol interference (ISI), which is a strong function of transmission line loss. This loss is dependent on the physical properties of the package and/or board materials, which exhibit batch-to-batch and vendor-to-vendor variation. Understanding these variations is imperative to close modeling gaps and enable predictable system designs. This document describes a simple, sparameter based measurement method for extracting RLGC parameters and presents results showing the impact of copper roughness and dielectric loss as functions of frequency for a variety of common PCB materials.