James A. Watson

Migration of a Dual Granularity Globally Interconnected PLD Architecture to a 0.5 µm TLM Process

A global interconnect architecture with dual granularity demonstrates considerable migration capability from the original product on 0.8Μ two layer metal process by reducing die size to one third while nearly doubling system frequency when transferred to a 0.5Μ three layer metal process.

A low power programmable logic device reconfigurable for 3.3 V or 5.0 V operation during and after fabrication

A programmable logic device which is reconfigurable to operate at either a 3.3 V or 5.0 V supply specification has been fabricated. On-chip circuitry is dynamically adjusted for 3.3 V or 5.0 V operation. The voltage supply configuration can be changed after fabrication by opening a fuse or writing into a selection register. The device consumes less than 500 /spl mu/W of power at 3.3 volts.<<ETX>>