Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Francis B. Heile is active.

Publication


Featured researches published by Francis B. Heile.


custom integrated circuits conference | 1993

A dual granularity and globally interconnected architecture for a programmable logic device

Richard G. Cliff; B. Ahanin; L.T. Cope; Francis B. Heile; R. Ho; Joseph Huang; C. Lytle; S. Mashruwala; Bruce B. Pedersen; R. Raman; Srinivas T. Reddy; V. Singhal; Chiakang Sung; Kerry Veenstra; A. Gupta

A novel architecture called FLEX (flexible logic element matrix) has been designed which supports high logic densities up to 24,000 gates, maximizing overall system performance in a user design. This has been accomplished through a dual granularity approach and a global interconnect strategy. The dual granularity and global interconnect approach has succeeded in supporting both short nets and long nets for maximum performance.


custom integrated circuits conference | 1999

A next generation architecture optimized for high density system level integration

Richard G. Cliff; Srinivas T. Reddy; Cameron San Jose McClintock; David Jefferson; Chris Lane; Ketan Zaveri; Manuel Mejia; Andy L. Lee; Ninh D. Ngo; R. Altaf; Bruce B. Pedersen; Francis B. Heile; James Schleicher; John E. Turner

Altera has developed a next generation architecture called APEX/sup TM/ to improve overall logic efficiency, performance and provide a framework to add a much broader range of features which enables complete system level integration of a users system. This new architecture will support a family of devices exceeding 2 million gates in density. Density and speed improvements are achieved through an enhanced hierarchical routing structure.


Archive | 1992

Programmable logic array having local and long distance conductors

Richard G. Cliff; Bahram Ahanin; Craig S. Lytle; Francis B. Heile; Bruce B. Pedersen; Kerry Veenstra


Archive | 1991

Programmable logic element interconnections for programmable logic array integrated circuits

Bruce B. Pedersen; Richard G. Cliff; Bahram Ahanin; Craig S. Lytle; Francis B. Heile; Kerry Veenstra


Archive | 1997

Work group computing for electronic design automation

Francis B. Heile; Brent A. Fairbanks


Archive | 1993

High-density erasable programmable logic device architecture using multiplexer interconnections

Bruce B. Pedersen; David Chiang; Francis B. Heile; Cameron McClintock; Hock-Chuen So; James A. Watson


Archive | 1994

Programmable logic array with local and global conductors

Bruce B. Pedersen; Richard G. Cliff; Bahram Ahanin; Craig S. Lytle; Francis B. Heile; Kerry Veenstra


Archive | 2000

Generation of sub-netlists for use in incremental compilation

Bruce B. Pedersen; Francis B. Heile; Marwan A. Khalaf; David W. Mendel


Archive | 1998

Programmable logic array device with random access memory configurable as product terms

Francis B. Heile


Archive | 1999

Incremental compilation of electronic design for work group

Francis B. Heile; Brent A. Fairbanks

Collaboration


Dive into the Francis B. Heile's collaboration.

Researchain Logo
Decentralizing Knowledge