James W Pomeroy

Benchmarking of Thermal Boundary Resistance in AlGaN/GaN HEMTs on SiC Substrates: Implications of the Nucleation Layer Microstructure

A thermal boundary resistance (TBR) is associated with the presence of an AlN nucleation layer (NL) in AlGaN/GaN high-electron-mobility transistors (HEMTs) grown on SiC substrates, raising device temperature beyond what is expected from the simple thermal conductivities of the main device layers. TBR was found to differ by up to a factor of four between different device suppliers, all using standard metal-organic chemical vapor deposition (MOCVD) growth techniques, related to the detailed NL microstructure. Optimizing the NL crystalline structure in MOCVD could therefore significantly improve heat extraction from AlGaN/GaN HEMTs into the SiC substrate, potentially reducing peak channel temperature rise by up to 40%, significantly benefiting device reliability.

Channel Temperature Determination in High-Power AlGaN/GaN HFETs Using Electrical Methods and Raman Spectroscopy

Self-heating in AlGaN/GaN HFETs was investigated using electrical analysis and micro-Raman thermography. Two typically employed electrical methods were assessed to provide a simple means of extracting average channel temperatures in devices. To quantify the accuracy of these electrical temperature measurements, micro-Raman thermography was used to provide submicron resolution temperature information in the source-drain opening of the devices. We find that electrical methods significantly underestimate peak channel temperatures, due to the fact that electrical techniques measure an average temperature over the entire active device area. These results show that, although electrical techniques can be used to provide qualitative comparisons between different devices, they have challenges for the accurate estimation of peak channel temperatures. This needs to be taken into account for lifetime testing and reliability studies based on electrical temperature measurements.

Micro-Raman temperature measurements for electric field assessment in active AlGaN-GaN HFETs

Temperature profiles in the source/drain (S/D) opening of a single finger AlGaN-GaN heterostructure field-effect transistor were studied at increasing S/D voltages by micro-Raman spectroscopy with <1 /spl mu/m spatial resolution. These profiles imply high field regions near the gate edge of length /spl sim/0.4 /spl mu/m for S/D voltages between 45 and 75 V. Electric field strengths of /spl sim/1.2 and /spl sim/1.9 MV/cm are estimated for 45 and 75 V S/D voltage. The experimental results are in excellent agreement with 2-D Monte Carlo simulations.

Phonon lifetimes and phonon decay in InN

We report on the Raman analysis of A1(LO) (longitudinal optical) and E2 phonon lifetimes in InN and their temperature dependence from 80 to 700 K. Our experimental results show that among the various possible decay channels, the A1(LO) phonon decays asymmetrically into a high energy and a low energy phonon, whereas the E2 phonon predominantly decays into three phonons. Possible decay channels of the A1(LO) phonon may involve combinations of transverse optical and acoustic phonons. Phonon lifetimes of 1.3 and 4 ps were measured at 80 K for the A1(LO) and the E2 phonons, respectively. This rather long A1(LO) phonon lifetime suggests that hot phonon effects will play a role in InN for carrier relaxation.

Simultaneous measurement of temperature and thermal stress in AlGaN/GaN high electron mobility transistors using Raman scattering spectroscopy

Raman spectroscopy, utilizing both the GaN E2 and A1(LO) phonon modes, has been used to simultaneously probe temperature and thermal stress in operating AlGaN/GaN high electron mobility transistors (HEMTs). Temperature and thermal stress profiles across the active region of an AlGaN/GaN HEMT were determined. The results were found to be in good agreement with thermal and thermomechanical simulations. The maximum temperature rise and thermal stress measured in the GaN layer are located close to the drain edge of the gate contact, reaching 240 °C and −0.37 GPa, respectively, for a power dissipation of 25 W/mm (40 V).

Reducing Thermal Resistance of AlGaN/GaN Electronic Devices Using Novel Nucleation Layers

Currently, up to 50% of the channel temperature in AlGaN/GaN electronic devices is due to the thermal-boundary resistance (TBR) associated with the nucleation layer (NL) needed between GaN and SiC substrates for high-quality heteroepitaxy. Using 3-D time-resolved Raman thermography, it is shown that modifying the NL used for GaN on SiC epitaxy from the metal-organic chemical vapor deposition (MOCVD)-grown standard AlN-NL to a hot-wall MOCVD-grown AlN-NL reduces NL TBR by 25%, resulting in ~10% reduction of the operating temperature of AlGaN/GaN HEMTs. Considering the exponential relationship between device lifetime and temperature, lower TBR NLs open new opportunities for improving the reliability of AlGaN/GaN devices.

Low thermal resistance GaN-on-diamond transistors characterized by three-dimensional Raman thermography mapping

In order to achieve ultra-high radio frequency output power densities in GaN-based transistors new thermal management solutions must be developed for efficient heat extraction, including the use of high thermal conductivity substrates. Integration of GaN devices with the highest thermal conductivity material available, diamond, instead of the standard GaN-on-SiC, can lead to a substantial reduction in device thermal resistance. Current GaN-on-diamond transistors are shown to result in a 40% reduction in peak channel temperature when benchmarked against equivalent GaN-on-SiC transistors, with the potential for even further reductions through optimization. In order to understand the contribution of substrate and GaN/substrate interface to the device thermal resistance, a 3D Raman thermography mapping and modelling approach has been developed. The GaN/diamond interface thermal resistance is found to have the largest contribution to the thermal resistance of current GaN-on-diamond devices.

Thermal mapping of defects in AlGaN∕GaN heterostructure field-effect transistors using micro-Raman spectroscopy

We illustrate the use of micro-Raman mapping to study the local effect of defects on device temperature in active AlGaN∕GaN heterostructure field-effect transistors. Significant temperature rises in active devices, 50–100% above average device temperatures, were identified in the vicinity of defects. Measured temperature distributions were compared to finite difference simulations. Reduced thermal conductivity in the defect vicinity was found to be responsible for the local temperature rises in these devices, combined with possible changes in the current flow distribution.

Nanosecond Timescale Thermal Dynamics of AlGaN/GaN Electronic Devices

Time-resolved Raman thermography, with a temporal resolution of , was used to study the thermal dynamics of AlGaN/GaN electronic devices (high-electron mobility transistors and ungated devices). Heat diffusion from the device active region into the substrate and within the devices was studied. Delays in the thermal response with respect to the electrical pulse were determined at different locations in the devices. Quasi-adiabatic heating of the AlGaN/GaN devices is illustrated within the first of device operation. The temperature of devices on SiC was found to reach of the dc temperature when operated with -long electrical pulses.

Reducing GaN-on-diamond interfacial thermal resistance for high power transistor applications

Integration of chemical vapor deposited polycrystalline diamond offers promising thermal performance for GaN-based high power radio frequency amplifiers. One limiting factor is the thermal barrier at the GaN to diamond interface, often referred to as the effective thermal boundary resistance (TBReff). Using a combination of transient thermoreflectance measurement, finite element modeling and microstructural analysis, the TBReff of GaN-on-diamond wafers is shown to be dominated by the SiNx interlayer for diamond growth seeding, with additional impacts from the diamond nucleation surface. By decreasing the SiNx layer thickness and minimizing the diamond nucleation region, TBReff can be significantly reduced, and a TBReff as low as 12 m2K/GW is demonstrated. This enables a major improvement in GaN-on-diamond transistor thermal resistance with respect to GaN-on-SiC wafers. A further reduction in TBReff towards the diffuse mismatch limit is also predicted, demonstrating the full potential of using diamond as the heat spreading substrate.