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Ibm Systems Journal | 1999

SP2 system architecture

Tilak Agerwala; Joanne L. Martin; Jamshed H. Mirza; David C. Sadler; Daniel M. Dias; Marc Snir

Scalable parallel systems are increasingly being used today to address existing and emerging application areas that require performance levels significantly beyond what symmetric multiprocessors are capable of providing. These areas include traditional technical computing applications, commercial computing applications such as decision support and transaction processing, and emerging areas such as “grand challenge” applications, digital libraries, and video production and distribution. The IBM SP2™ is a general-purpose scalable parallel system designed to address a wide range of these applications. This paper gives an overview of the architecture and structure of SP2, discusses the rationale for the significant system design decisions that were made, indicates the extent to which key objectives were met, and identifies future system challenges and advanced technology development areas.


parallel computing | 1998

Addressing the Requirements of ASCI-class Systems

Jamshed H. Mirza

The talk will discuss IBM’s strategy for ultra-large scale systems such as those required for the US Department of Energy’s ASCI (Accelerated Strategic Computing Initiative) program. We will give a brief overview of the systems that will address performance requirements of up to 10 TFLOPS over the next two years, and discuss the future evolution of the RS6000/SP system architecture.


parallel computing | 1995

Designing a Scalable Parallel System: the IBM SP2*

Tilak Agerwala; Jamshed H. Mirza; Marc Snir

Publisher Summary This chapter discusses that the IBM SP2 is a general purpose scalable parallel system designed to address a variety of application areas and customer environments. Generally available SP2 systems range from 2 to 128 nodes, although much larger systems, up to 512 nodes have been delivered and are successfully being used today. The nodes are the latest POWER2 technology RS/6000 processors, interconnected with a high performance multi-stage packet-switched network for inter-processor communication. Standard AIX operating system is complemented with a set of software products for system management, job management, and application development and execution in the parallel environment. The system is designed for flexibility and availability, and addresses a wide range of application areas in the high-end UNIX technical and commercial computing area. The chapter discusses the underlying philosophy that guided the design of the SP2 system and then gives an overview of the architecture and structure of the system and some of the primary system components, including wherever relevant the rationale for significant system design decisions. There is also some discussion about the system performance and future system challenges.


Archive | 1991

Cache prefetch and bypass using stride registers

Jamshed H. Mirza; Steven Wayne White


Archive | 1991

Automatic cache bypass for instructions exhibiting poor cache hit ratio

Jamshed H. Mirza


Archive | 1997

Signaling communication events in a computer network

Carl A. Bender; Paul David Dinicola; Kevin J. Gildea; Rama K. Govindaraju; Chulho Kim; Jamshed H. Mirza; Gautam H. Shah; Jaroslaw Nieplocha


Archive | 1997

Hardware interface between a switch adapter and a communications subsystem in a data processing system

Carl A. Bender; Paul David Dinicola; Kevin J. Gildea; Rama K. Govindaraju; Chulho Kim; Jamshed H. Mirza; Gautam H. Shah


Archive | 1994

Dynamic look-aside table for multiple size pages

Jeffery Y. Lee; Jamshed H. Mirza; Robert James Stanton


Archive | 1997

Method and apparatus for efficient communications using active messages

Carl A. Bender; Paul David Dinicola; Kevin J. Gildea; Rama K. Govindaraju; Chulho Kim; Jamshed H. Mirza; Gautam H. Shah


Archive | 1994

Single translation mechanism for virtual storage dynamic address translation with non-uniform page sizes

Jamshed H. Mirza; Steven Wayne White

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