Jan Hendrik Peters

Wafer based mask characterization for double patterning lithography

Double Patterning Technology (DPT) is considered the most acceptable solution for 32nm node lithography. Apart from the obvious drawbacks of additional exposure and processing steps and therefore reduced throughput, DPT possesses a number of additional technical challenges. This relates to exposure tool capability, the actual applied process in the wafer fab but also to mask performance. This paper will focus on the latter. We will report on the performance of a two-reticle set based on a design developed to study the impact of mask global and local placement errors on a DPT dual line process. For 32 nm node lithography using DPT a reticle to reticle overlay contribution target of ≤ 1.5nm has been proposed. Reticle based measurements have shown that this proposed target can be met for standard overlay features and dedicated DPT features. In this paper we will present experimental intra field overlay wafer data resulting from the earlier mentioned reticle set. The reticles contain a 13x19 array of modules comprising various standard overlay features such as ASML overlay gratings and bar-in-bar overlay targets. Furthermore the modules contain split 40nm half pitch DPT features. The reticles have been exposed on an ASML XT:1700i on several wafers in multiple fields. Reticle to reticle overlay contribution has been studied in resist (double exposure) and using the IMEC dual line process (DPT). We will show that the reticle to reticle overlay contribution on the wafer is smaller than 1.5nm (1x). We will compare the wafer data with the reticle data, study the correlation and show that reticle to reticle overlay contribution based single mask registration measurements can be used to qualify the reticle to reticle overlay contribution on wafer.

Determination of mask induced polarization effects occurring in hyper NA immersion lithography

As the lithographic projection technology of the future will require higher numerical aperture (NA) values, new physical effects will have to be taken into consideration. Immersion lithography will result in NA values of up to 1.2 and above. New optical effects like 3D shadowing, effects from oblique incident angles, mask-induced polarization of the transmitted light and birefringence from the substrate should be considered when the masks optical performance is evaluated. This paper addresses mask induced polarization effects from dense lines-and-space structures of standard production masks. On a binary and on an attenuated phase-shifting mask, which were manufactured at the Advanced Mask Technology Center (AMTC) transmission experimental investigations were performed. Measurements of diffraction efficiencies for TE- and TM-polarized light using three different incident angles are presented for all considered mask types and compared to simulations. The structures under investigation include line-space-pattern with varying pitches as well as varying duty cycles. Experimental results show good agreement with simulations.

Wafer inspection as alternative approach to mask defect qualification

Defect inspection is one of the major challenges in the manufacturing process of photomasks. The absence of any printing defect on patterned mask is an ultimate requirement for the mask shop, and an increasing effort is spent in order to detect and subsequently eliminate these defects. Current DUV inspection tools use wavelengths five times or more larger than the critical defect size on advanced photomasks. This makes the inspectability of high-end mask patterns (including strong OPC and small SRAFs) and sufficient defect sensitivity a real challenge. The paper evaluates the feasibility of inspecting the printed wafer as an alternative way for the high-sensitivity defect inspection of photomasks. Defects originating in the mask can efficiently be filtered as repeated defects in the various dies on wafer. Using a programmed-defect mask of 65-nm technology, a reliable detection of the printing defects was achieved with an optimized inspection process. These defects could successfully be traced back to the photomask in a semi-automated process in order to enable a following repair step. This study shows that wafer inspection is able to provide a full defect qualification of advanced photomasks with the specific advantage of assessing the actual printability of arbitrary defects.

Actinic review of EUV masks: first results from the AIMS EUV system integration

The EUV mask infrastructure is of key importance for a successful introduction of EUV lithography into volume production. In particular, for the production of defect free masks, actinic review of potential defect sites is required. To realize such an actinic review tool, Zeiss and the SEMATECH EUVL Mask Infrastructure consortium started a development programme for an EUV aerial image metrology system (AIMS™ EUV). In this paper, we discuss the status of the on-going system integration and show first results from the first light tests of the prototype tool.

Aerial imaging technology for photomask qualification: from a microscope to a metrology tool

Abstract Photomasks carry the structured information of the chip designs printed with lithography scanners onto wafers. These structures, for the most modern technologies, are enlarged by a factor of 4 with respect to the final circuit design, and 20–60 of these photomasks are needed for the production of a single completed chip used, for example, in computers or cell phones. Lately, designs have been reported to be on the drawing board with close to 100 of these layers. Each of these photomasks will be reproduced onto the wafer several hundred times and typically 5000–50 000 wafers will be produced with each of them. Hence, the photomasks need to be absolutely defect-free to avoid any fatal electrical shortcut in the design or drastic performance degradation. One well-known method in the semiconductor industry is to analyze the aerial image of the photomask in a dedicated tool referred to as Aerial Imaging Measurement System, which emulates the behavior of the respective lithography scanner used for the imaging of the mask. High-end lithography scanners use light with a wavelength of 193 nm and high numerical apertures (NAs) of 1.35 utilizing a water film between the last lens and the resist to be illuminated (immersion scanners). Complex illumination shapes enable the imaging of structures well below the wavelength used. Future lithography scanners will work at a wavelength of 13.5 nm [extreme ultraviolet (EUV)] and require the optical system to work with mirrors in vacuum instead of the classical lenses used in current systems. The exact behavior of these systems is emulated by the Aerial Image Measurement System (AIMS™; a Trademark of Carl Zeiss). With these systems, any position of the photomask can be imaged under the same illumination condition used by the scanners, and hence, a prediction of the printing behavior of any structure can be derived. This system is used by mask manufacturers in their process flow to review critical defects or verify defect repair success. In this paper, we give a short introduction into the lithography roadmap driving the development cycles of the AIMS systems focusing primarily on the complexity of the structures to be reviewed. Second, we describe the basic principle of the AIMS technology and how it is used. The last section is dedicated to the development of the latest generation of the AIMS for EUV, which is cofinanced by several semiconductor companies in order to close a major gap in the mask manufacturing infrastructure and the challenges to be met.

Massively parallel E-beam inspection: enabling next-generation patterned defect inspection for wafer and mask manufacturing

SEMATECH aims to identify and enable disruptive technologies to meet the ever-increasing demands of semiconductor high volume manufacturing (HVM). As such, a program was initiated in 2012 focused on high-speed e-beam defect inspection as a complement, and eventual successor, to bright field optical patterned defect inspection [1]. The primary goal is to enable a new technology to overcome the key gaps that are limiting modern day inspection in the fab; primarily, throughput and sensitivity to detect ultra-small critical defects. The program specifically targets revolutionary solutions based on massively parallel e-beam technologies, as opposed to incremental improvements to existing e-beam and optical inspection platforms. Wafer inspection is the primary target, but attention is also being paid to next generation mask inspection. During the first phase of the multi-year program multiple technologies were reviewed, a down-selection was made to the top candidates, and evaluations began on proof of concept systems. A champion technology has been selected and as of late 2014 the program has begun to move into the core technology maturation phase in order to enable eventual commercialization of an HVM system. Performance data from early proof of concept systems will be shown along with roadmaps to achieving HVM performance. SEMATECH’s vision for moving from early-stage development to commercialization will be shown, including plans for development with industry leading technology providers.

Actinic review of EUV masks: Status and recent results of the AIMS EUV system

The EUV mask infrastructure is of key importance for the successful introduction of EUV lithography into volume production. In particular, for the production of defect free masks an actinic review of potential defect sites is required. To realize such an actinic review tool, Carl Zeiss and the SEMATECH EUVL Mask Infrastructure consortium started a development program for an EUV aerial image metrology system, the AIMS™ EUV. In this paper, we discuss the current status of the prototype integration and show recent results.

AIMS EUV first light imaging performance

Overcoming the challenges associated with photomask defectivity is one of the key aspects associated with EUV mask infrastructure. In addition to establishing specific EUV mask repair approaches, the ability to identify printable mask defects that require repair as well as to verify if a repair was successful are absolutely necessary. Such verification can only be performed by studying the repaired region using actinic light at an exact emulation of the scanner illumination conditions of the mask as can be done by the AIMSTM EUV. ZEISS, in collaboration with the SEMATECH EUVL Mask Infrastructure (EMI) consortium are currently developing the AIMSTM EUV system and have recently achieved First Light on the prototype system, a major achievement. First light results will be presented in addition to the current development status of the system.

Status of the AIMS EUV development project

The need for an actinic wavelength AIMS™ EUV tool by 2014 has been defined by SEMATECH due to the challenges associated with EUV mask manufacture and defectivity. The AIMS™ EUV development project began in June of 2011 as a collaboration between ZEISS and the SEMATECH EUVL Mask Infrastructure (EMI) consortium. The project remains on track to meet the first commercial tool shipment in September 2014. The current design status of the system after two years as well as recent progress in the prototype build will be presented.

Assessing EUV mask defectivity

This paper assesses the readiness of EUV masks for pilot line production. The printability of well characterized reticle defects, with particular emphasis on those reticle defects that cause electrical errors on wafer test chips, is investigated. The reticles are equipped with test marks that are inspected in a die-to-die mode (using DUV inspection tool) and reviewed (using a SEM tool), and which also comprise electrically testable patterns. The reticles have three modules comprising features with 32 nm ground rules in 104 nm pitch, 22 nm ground rules with 80 nm pitch, and 16 nm ground rules with 56 nm pitch (on the wafer scale). In order to determine whether specific defects originate from the substrate, the multilayer film, the absorber stack, or from the patterning process, the reticles were inspected after each fabrication step. Following fabrication, the reticles were used to print wafers on a 0.25 NA full-field ASML EUV exposure tool. The printed wafers were inspected with state of the art bright-field and Deep UV inspection tools. It is observed that the printability of EUV mask defects down to a pitch of 56 nm shows a trend of increased printability as the pitch of the printed pattern gets smaller - a well established trend at larger pitches of 80 nm and 104 nm, respectively. The sensitivity of state-of-the-art reticle inspection tools is greatly improved over that of the previous generation of tools. There appears to be no apparent decline in the sensitivity of these state-of-the-art reticle inspection tools for higher density (smaller) patterns on the mask, even down to 56nm pitch (1x). Preliminary results indicate that a blank defect density of the order of 0.25 defects/cm2 can support very early learning on EUV pilot line production at the 16nm node.