Jan-Ou Wu

Energy efficiency of task allocation for embedded JPEG systems.

Embedded system works everywhere for repeatedly performing a few particular functionalities. Well-known products include consumer electronics, smart home applications, and telematics device, and so forth. Recently, developing methodology of embedded systems is applied to conduct the design of cloud embedded system resulting in the applications of embedded system being more diverse. However, the more energy consumes result from the more embedded system works. This study presents hyperrectangle technology (HT) to embedded system for obtaining energy saving. The HT adopts drift effect to construct embedded systems with more hardware circuits than software components or vice versa. It can fast construct embedded system with a set of hardware circuits and software components. Moreover, it has a great benefit to fast explore energy consumption for various embedded systems. The effects are presented by assessing a JPEG benchmarks. Experimental results demonstrate that the HT, respectively, achieves the energy saving by 29.84%, 2.07%, and 68.80% on average to GA, GHO, and Lin.

A MULTI-BAND LOW NOISE AMPLIFIER WITH GAIN FLATNESS AND BANDWIDTH ENHANCEMENT

In this paper, a differential multi-band CMOS low noise amplifier (LNA) is proposed that is operated within a range of 1500–2700 MHz with input matching capacitor switching and gain flatness performance enhancement technique. Traditional multi-band LNAs have poor performances on gain flatness performance. Therefore, we propose a new multi-band LNA which obtain good gain flatness performance by integrating the characteristics of the transistor trans-conductance and LC resonant load. The new LNA can also achieve a tunable frequency at different matching capacitance conditions. The post-layout simulation results shows that the voltage gain is between 19.3 dB and 22.4 dB, the NF is less than 2.5 dB, and the 1-dB compression point is about -5.1 dBm. The LNA consumes 17.79 mW under 1.8 V supply voltage in TSMC 0.18-um RF CMOS process.

Middleware Software for Embedded Systems

Embedded systems with communicating and computing ability and multimedia functions work to every corner of daily life. However, the diverse architectures of embedded systems cause problems corresponding to reuse, portability and dependability. Middleware is a set of software that executes between operating system and application to solve stated problems. The advantages include unified interface, scalable and transparent abilities. This project investigates middleware technology on embedded systems and then proposes embedded middleware architecture to overcome the problems relating to reuse, portability, dependability and transparency. The proposed middleware consists of API module, service manager module and content manager module. The API module is designed to communicate with upper layer and lower layer by unified interface. Also, it provides a set of methods for solving problems of portability and dependability. The service manager module conducts a set of services for application. Moreover, it is able to automatically generate and deploy content information. The content manager module organizes and supplies information to the service manager module. Additionally, it solves transparent problem by ASCII and URL representation. In order to verify the feasibility for the proposed approach, we design the application of touch screen for embedded middleware system. Not only middleware but also embedded operating system, shell script, embedded graphical user interface and application are validated. Finally, we assess the functionality and integrated test of embedded middleware system by S3C2410 and XScale PXA270 system.

Inverse scattering for the perfectly conducting cylinder by asynchronous particle swarm optimization

This paper reports a two-dimensional time-domain inverse scattering algorithm based upon the finite-difference time domain method for determining the shape of perfectly conducting cylinder. Finite difference time domain method (FDTD) is used to solve the scattering electromagnetic wave of a perfectly conducting cylinder. The inverse problem is resolved by an optimization approach and the global searching scheme asynchronous particle swarm optimization (APSO) is then employed to search the parameter space. By properly processing the scattered field, some EM properties can be reconstructed. One is the location of the conducting cylinder, the others is the shape of the perfectly conducting cylinder. Numerical result indicates that the APSO outperforms the PSO in terms of reconstruction accuracy and convergence speed.

Efficient energy exploration for embedded systems

Mobile and ubiquitous computation of embedded system exacerbates energy consumption. In this work, we propose minimum energy path (MEP) approach to improve energy efficiency for embedded system. The MEP adopts path-based strategy to constructs a set of path class. Each path comprises the number of tasks that will be sequentially determined the role depending on the energy consumption. As a result, the energy efficiency is gradually improved while sequential paths are progressively identified the role of tasks. Experimental results show that MEP that can achieve 7.88% energy saving on average in all cases.

Grey decision of optimal simultaneous mapping and clustering to improve FPGA performance

This work studies how the architectural parameters of LUT-based field programmable gate arrays (FPGAs) are related to the LUT cluster size N and input number k A novel algorithm is proposed to combine grey decision-making approach for solving the problem of FPGA performance. Experimental results demonstrate that the algorithm improves the DAO map+T-VPack delay by 7.27% and reduces the SMAC total of CLB number by 22.15% on average. Furthermore, our proposed can get optimizes performance by appropriate selection of pairs of LUT cluster size N and input number k to construct the FPGA architecture with inequality demandable weight in area, energy, and delay.

Through-wall imaging for a two-dimensional perfectly conducting cylinder based on asynchronous particle swarm optimization

We introduce a microwave imaging technique that integrates the asynchronous particle swarm optimization (APSO) into through wall imaging (TWI) within the finite difference time domain (FDTD) model of the inverse scattering problem. The forward scattering equations are solved by the FDTD method is employed to calculate the scattered E fields. Based on the scattering fields, the inverse scattering problems are transformed into optimization problems. The ability of asynchronous particle swarm optimization (APSO) stochastic searching algorithm for shape reconstruction of a 2-D conducting target hidden behind a homogeneous building wall is demonstrated by using simulated backscattered fields. The APSO is a population-based optimization approach that aims to minimize the objective function between mimic measurements and computer-simulated data. Thus, the shape of perfectly conducting cylinder can be obtained by minimizing the objective function. Simulations show that APSO can successfully reconstruct the through-wall imaging for a perfectly conducting cylinder. In addition, the effect of Gaussian noise on the reconstruction is investigated.

The scheduling and placement strategies for FPGA dynamic reconfigurable system

In recent years, the FPGA performance requirements are changes in the evolution. From the past a static schedule way, development tasks are running to the dynamic scheduling system. This study proposed FPGA dynamic reconfigurable scheduling and placement base on TGFF generated Random standard schedule and Grey relation of grey system. The scheduling method accords to the placement of strategy objectives mentioned in the different tasks and time, while the placement of the ideal state, the FPGA resources will improve utilization, and reduce waste. Finally, the results of the mentioned method strategy the placement make scheduling strategy referred to reach the ideal state.

Grey relational clustering associated with CAPRI applied to FPGA placement

Grey relational clustering is used to minimise wire length during field programmable gate arrays (FPGA) placement and routing. The proposed Grey Relational Clustering Apply to Placement (GRAP) algorithm combines grey relational clustering and convex assigned placement for regular ICs method to construct a placement netlist, which was successfully used to solve the problem of minimising wire length in an FPGA placement. Upon calculating the grey relational grade, GRAP can rank the sequence and analyse the minimal distance in configuration logic blocks based on the grey relational sequence and combined connection-based approaches. The experimental results demonstrate that the GRAP effectively compares the Hibert, Z and Snake with bounding box (BB) cost function in the space-filling curve. The GRAP improved BB cost by 0.753%, 0.324% and 0.096% for the Hilbert, Z and Snake, respectively. This study also compares the critical path with the space-filling curve. The GRAP approach improved the critical path for Snake by 1.3% in the space-filling curve; however, the GRAP increased critical path wire by 1.38% and 0.03% over that of the Hilbert and Z of space-filling curve, respectively.

Grey relational grade applied to FPGA placement with minimal wire length

This work aims at developing grey relational grade for minimal wire length FPGA placement to follow-up the FPGA routing work. The proposed GRAP (Grey Relational Grade Apply to Placement) algorithm was combined with grey relational clustering and CAPRI algorithm to construct a placement netlist to successfully solve minimal wire length in FPGA placement design problem. After the grey relational grade is calculated, GRAP can rank the sequence and analyze the minimal distance in CLB blocks from the grey relational sequence and combine connection-based approaches. Experimental results demonstrate that the proposed algorithm can obtain minimal total wire length.