Jan van Sinderen

A 45nm WCDMA transmitter using direct quadrature voltage modulator with high oversampling digital front-end

In FDD systems such as WCDMA and LTE, simultaneous TX and RX operation poses a stringent TX noise floor requirement at the RX band. To eliminate the SAW filter between the TX and the PA without desensitizing the RX in WCDMA applications, the TX noise has to be lower than −156dBc/Hz [1–3]. In addition, the co-existence of cellular applications with other connectivity, navigation, and broadcast applications, also results in a stringent far-out noise floor requirement for all the TX including TDD systems such as TD-SCDMA and WiMax.

A 45nm low-power SAW-less WCDMA transmit modulator using direct quadrature voltage modulation

In FDD systems such as WCDMA and LTE, TX and RX operate simultaneously, while the duplexer provides the necessary isolation between them. In order not to desensitize the RX path, the TX noise in WCDMA band 1 has to be lower than −155dBc/Hz at 190MHz offset (RX band), given a 45dB TX-to-RX isolation from the duplexer [1]. Furthermore, when transmitting at 1920MHz, the nearest frequency offset to the DCS band (1805 to 1880MHz) is 40MHz. At this offset typical WCDMA duplexers only offer a few dB of attenuation. To comply with the 3GPP emissions mask, the TX noise at −40MHz offset is expected be lower than −148dBc/Hz (with 3dB margin). Currently there is a growing demand to integrate WCDMA and GPS applications in the same mobile device. In order not to interfere with the GPS receiver, the far-out noise floor of the WCDMA TX is also desired to be very low.

A wideband single-PLL RF receiver for simultaneous multi-band and multi-channel digital car Radio reception

This paper describes a single-PLL, fixed-oscillator, wide-band multi-tuner HD Radio & DAB/T-DMB receiver for concurrent multi-band & multi-channel car radio reception, fully integrated in a 65nm CMOS SoC. Besides saving area and power for the LO and clock generation, the presented architecture also prevents oscillator pulling and spurs. Harmonic rejection mixers have been used to suppress down-conversion with LO harmonics up to 60dB, which reduces the required amount of RF filtering. The DAB measurement results show best-in-class blocker performance (FoS up to 70dBc) in combination with state-of-the-art sensitivity down to -102dBm.

Impact of amplifier bandwidth limitations on gain-boosted N-path receivers

The bandwidth of the RF amplifier severely limits the use of gain-boosted N-path receivers at high frequencies. Apart from limitation on the achievable impedance matching, the noise figure degradation severely handicaps the performance of the receiver. This paper describes a linear periodically time-variant (LPTV) analysis of the gain-boosted N-path receiver taking the amplifier bandwidth into consideration. By using the proposed analysis, the gain-boosted N-path receiver performance degradations are quantified and explained.

Session 26 overview: Wireless for IoE

This session features numerous low-power wireless techniques and systems to address the challenges of IoE. Presented are an ADPLL-based hybrid-loop BLE receiver, an ultra-low-power receiver using transmitted reference modulation, a fully digital IEEE 802.11ah-compliant polar transmitter, an ETSI Class-1-compliant IoE transceiver, a GNSS receiver aimed at IoE applications, a Filtering-by-Aliasing receiver, a syringe-implantable radio system on glass substrate including antenna, a BLE-compliant wake-up radio and an N-path switched-capacitor-based transceiver.

Session 13 overview: Energy-efficient RF systems: RF & wireless subcommittees

There is an increasing demand for energy efficient and very small wireless solutions for different applications such as IoT, wearable and wireless sensors. The papers presented in this session focus on various circuit and architecture techniques to demonstrate highly integrated low-power RF systems. Four papers present BLE RF system solutions. The other four papers demonstrate very-low-power techniques like receiver-based FLL, wake-up radio, extreme low duty-cycle regimes and RF energy harvesting.

Session 28 overview: Mixed-signal techniques for wireless: Wireless subcommittee

Mixed-signal circuit techniques are essential for high-performance and energy-efficient wireless systems. This session covers circuit techniques of ΔΣ-modulators and digital-to-time converters, as well as their application to software-defined radios, frequency synthesizers, and radar systems.

Multi-Mode Transmitters in CMOS

This paper both describes a multi-mode modulator for cellular 2.5, 3 and 4G applications and a multi-mode transmitter for connectivity standards like Bluetooth (BT), Zigbee and WLAN. Both multi-mode transmitters are implemented in deep submicron CMOS technology and demonstrate the use of digital techniques and innovative analogue circuit topologies for obtaining high efficiency and excellent performance. The two multi-mode transmitters have different architectures as their target applications impose different performance requirements.