Jean-Pierre Chante

Current-conveyor based field programmable analog array

An approach for designing a Field Programmable Analog Array (FPAA) is described. The analog array is based on current conveyors and benefits from two major interests: a large bandwidth and a low number of discrete components needed for the implementation of analog functions. An Analog Elementary Cell (AEC), based on current conveyors has been developed, and it is associated with programmable resistors and capacitors. Analog functions can be performed programming several AECs as current-mode amplifiers, analog multipliers, etc. The main purpose of this paper is to introduce current conveyor based analog blocks which are very-well suited for the implementation of FPAA. A particular interconnection architecture is addressed using current conveyors as switches. The major key feature of the proposed approach is that current conveyors are used as active elements and switching elements. A new topology based on the developed AEC is proposed and should be shortly validated.

Low-doped 6H-SiC n-type epilayers grown by sublimation epitaxy

Abstract Sublimation epitaxy has not yet been a technique of prime importance to grow epitaxial 6H-SiC layers because grown layers have always shown a residual net doping level higher than 10 16 cm −3 and a high compensation level. We present here results obtained with an optimized technology of sublimation epitaxial growth, which can be used to obtain structurally perfect layers with a concentration of uncompensated donors as low as 10 15 cm −3 . These layers have been both physically and electrically characterized. Deep level transient spectroscopy indicates that the concentration of deep levels is greatly reduced. As a consequence the hole diffusion length is significantly increased up to about 2.5 μm, as confirmed by electron beam induced current measurements. So these optimized layers are envisaged for the fabrication of high voltage diodes or bipolar transistors.

Electrothermal modeling of IGBTs: application to short-circuit conditions

This paper discusses the possible estimation of IGBT failure phenomena by means of simulation. The studied destruction mode addresses the large surges, especially the short-circuit of IGBTs. In this case the reason of the device destruction is a thermal runaway. Thus we have developed an electrothermal model of the IGBT. The developed model may be implemented in any circuit simulator featuring a high level description language (SABER, ELDO, SMASH, PACTE etc.). The used electrical model is based on the Hefner model of the IGBT. A bidimensional finite element thermal model is considered. This model has been optimized to give a good trade-off between accuracy and simulation cost. To validate the implemented model, finite element simulations have been performed with the ATLAS two-dimensional (2-D) numerical simulator. The study is completed with the comparison between experimental and simulation results. It is shown that the proposed electrothermal model allows the prediction of the IGBT destruction phases in the case of large surges. So, users of IGBT components have the possibility to estimate, by mean of simulation, the possible failure (due to large surges) of these devices in the case of complex converters. This enables the possibility for developing protection systems for IGBTs without any destructive test.

Effect of ion implantation parameters on Al dopant redistribution in SiC after annealing: Defect recovery and electrical properties of p-type layers

Epilayers of 6H and 4H–SiC were Al implanted with various doses to form p-type layers after a postimplantation annealing performed at 1700 °C/30 min. Rutherford backscattering spectrometry in the channeling mode analyses carried out before and after annealing show virgin nonimplanted equivalent spectra if the implanted layers are not amorphized. The amorphous layers are recrystallized after annealing with a residual damage level of the lattice relative to the quantity of the dopant implanted. Secondary ion mass spectrometry measurements performed on the implanted samples before and after annealing illustrate a good superposition of the profiles obtained before and after the annealing on nonamorphized samples. Dopant redistribution occurs after annealing, only on amorphized layers, with an intensity that increases with the implanted dose. Deduced from sheet resistance measurements, the dopant activation increases with the implanted dose. Activation of 80%–90% is obtained from capacitance–voltage measuremen...

EFFECT OF BORON DIFFUSION ON THE HIGH-VOLTAGE BEHAVIOR OF 6H-SIC P+NN+ STRUCTURES

Boron diffusion can be used to compensate the n-type layer of a p(+)nn(+) 6H-silicon carbide structure in order to increase its high-voltage capabilities. Measurements under reverse biases for a current range from 10 to 500 mu A show that this process is very efficient for working temperatures about 300 K. Indeed we obtained a voltage of 670 V for a reverse current of 10 mu A instead of the 120 V calculated for a structure without boron diffusion. Nevertheless, the breakdown voltage decreases rapidly when the temperature increases. Capacitance measurements show that the measured doping level in the n-type layer evolves in the same way as the temperature (it ranges from 10(13) cm(-3) at 300 K to 10(17) cm(-3) at 500 K). A great concentration of boron seems to be responsible for this doping variation with temperature. Admittance spectroscopy reveals the presence of D centers at 0.62 eV above the valence band associated to boron at concentration similar or superior to nitrogen concentration in the n-type layer. The increase of the doping level with the temperature is responsible for this decrease of the breakdown voltage.

Developing an equivalent thermal model for discrete semiconductor packages

The paper covers a useful and practical method for users of power semiconductor devices to derive dynamic thermal models of discrete semiconductor packages. Derivation is based on transient thermal impedance responses measured experimentally or deduced from semiconductor manufacturer data-sheets. Such dynamic thermal models are required for electro-thermal simulation of power electronic circuits corresponding to short power pulse excitations. Indeed in such excitations, the main transient phenomena occur inside the semiconductor die. Contrarily to classical thermal models based on simple resistor/capacitor cells, the proposed model is a behavioral thermal model based on the finite element modeling of the semiconductor chip. It takes into account the main thermal temperature-related non-linearities of package layers. The derived thermal models offer an excellent trade-off between accuracy, efficiency and CPU-cost.

A BiCMOS Current Conveyor Based Four-Quadrant Analog Multiplier

A novel circuit for an analog multiplier in BiCMOS technology is described. It is based on a two-current conveyor cell associated with a four MOSFET transconductor. This differential multiplier achieves a bandwidth of 10 MHz because of the use of high-frequency current-conveyor.

Electrical characteristics modeling of large area boron compensated 6H-SiC pn structures

New models for the high frequency capacitance-voltage, C(V) and forward current-voltage, IF(VF) characteristics of a large area 6H-SiC boron compensated pn junction have been developed and implemented in an optimal parameter extraction program. The C(V) model and SIMS measurements confirm the presence of two type regions (pand n ˇ ) in the quasi- intrinsic layer induced by boron doping. The extracted values of the net doping of these zones (6ˇ10 10 12 cm ˇ3 ) are in good agreement with previously reported data. In contrast, the thickness of the quasi-intrinsic layer, about twice the epilayer width, proves the expansion of the quasi-intrinsic region in the substrate. The IF(VF) modeling includes a square law dependence of the forward current on VF, at high injection level. For the first time in the literature, saturation currents of SiC pn diodes is reported. The extracted saturation currents increase linearly with area, evidencing the beneficial eAect of boron diAusion for obtaining predictable large area devices.

Design of a 600 V silicon carbide vertical power MOSFET

Silicon carbide (SiC) owns very interesting properties to fulfil the requirements of new power electronic applications. This paper reports the design of two vertical power MOSFETs, able to sustain a forward blocking voltage of 600 V. In order to evaluate the performance, 2D-simulations were performed taking into account the current technological constraints and the SiC materials parameters.

Power electronic circuit simulation using bond graph and Petri network techniques

The authors have proposed a semiconductor device modular modeling method based on the bond graphs techniques of Automatics. The application of bond-graph techniques to power electronic circuit modeling introduces the problem of causality switching. In order to clearly solve the problem of causality switching, the authors propose to model every elementary component with a Petri net. Simulation results are given.<<ETX>>