C. Raynaud

Silica films on silicon carbide: a review of electrical properties and device applications

This paper reviews the present knowledge on silica films (SiO2) on silicon carbide (SiC). First, kinetic of thermal oxidation of SiC is described, and the effects of a great number of parameters (various SiC polytypes, substrate type, substrate orientation...) are discussed. Mainly, thermal oxides grown on SiC are close to stoichiometric silica and the oxidation rate depends on the terminal face of the SiC monocrystal. The next four sections discuss the electrical properties of the oxide, and of the oxide/SiC interface, and especially the effects of materials and technological process on the interface state density and the effective oxide charge (Section 5), and the origin of the interface states are discussed in detail (Section 6). Oxides grown on n-type SiC have electrical properties (in terms of dielectric strength, leakage currents, interface trap, and oxide charges) measured by means of metal-oxide-semiconductor (MOS) structures, similar to oxides grown on silicon. Until recently, p-type SiC MOS structures have had a large equivalent oxide charge and larger interface state densities in spite of many efforts, compared to silicon MOS structures. It seems nevertheless that recent studies have improved the SiO2/SiC interfacial quality. Aluminum, carbon and alkali species are ihs main suspected contaminants. Finally, Section 7 presents the applications of oxide films in SE-based devices: MOS capacitors and MOS field effect transistors (MOSFETs) for microelectronics, MOSFETs for power electronics, and some applications using silica layers as a passivation layer. In spite of a smaller than required carrier mobility in the inversion layer, MOS field effect transistors (MOSFETs) have been demonstrated to operate up to 650 degreesC and integrated circuits based on NMOS and PMOS technologies have been successfully operated up to 300 degreesC. Vertical power MOSFETs are also of importance but their performances are still limited by a specific on-resistance larger than device requirements. The effect of charges present in the oxide on the electrical properties of high voltage diodes is also briefly discussed.

Barrier height determination of SiC Schottky diodes by capacitance and current-voltage measurements

Extractions of barrier heights of 6H and 4H-SiC Schottky diodes have been performed on structures with various gate metallization, using both capacitance-voltage (C-V) and current-voltage (I-V) measurements. The sum of the two barriers extracted by C-V measurements on both n-type and p-type materials is found to be higher than the band gap energy E-G, whereas the one extracted by I-V is less than E-G. However, above room temperature, temperature variations of barrier heights are in agreement with the variations of E-G. We have also computed theoretical I-V characteristics using a two-barrier height model. By taking account of temperature variations of a large number of parameters, e.g., the carrier mobility, free carrier concentration, and barrier height, we have achieved a good fit with experimental data. The model is shown to be valid for n-type Schottky diodes over a wide range of temperatures (from 100 to 500 K).

Low-doped 6H-SiC n-type epilayers grown by sublimation epitaxy

Abstract Sublimation epitaxy has not yet been a technique of prime importance to grow epitaxial 6H-SiC layers because grown layers have always shown a residual net doping level higher than 10 16 cm −3 and a high compensation level. We present here results obtained with an optimized technology of sublimation epitaxial growth, which can be used to obtain structurally perfect layers with a concentration of uncompensated donors as low as 10 15 cm −3 . These layers have been both physically and electrically characterized. Deep level transient spectroscopy indicates that the concentration of deep levels is greatly reduced. As a consequence the hole diffusion length is significantly increased up to about 2.5 μm, as confirmed by electron beam induced current measurements. So these optimized layers are envisaged for the fabrication of high voltage diodes or bipolar transistors.

Effect of ion implantation parameters on Al dopant redistribution in SiC after annealing: Defect recovery and electrical properties of p-type layers

Epilayers of 6H and 4H–SiC were Al implanted with various doses to form p-type layers after a postimplantation annealing performed at 1700u200a°C/30u2009min. Rutherford backscattering spectrometry in the channeling mode analyses carried out before and after annealing show virgin nonimplanted equivalent spectra if the implanted layers are not amorphized. The amorphous layers are recrystallized after annealing with a residual damage level of the lattice relative to the quantity of the dopant implanted. Secondary ion mass spectrometry measurements performed on the implanted samples before and after annealing illustrate a good superposition of the profiles obtained before and after the annealing on nonamorphized samples. Dopant redistribution occurs after annealing, only on amorphized layers, with an intensity that increases with the implanted dose. Deduced from sheet resistance measurements, the dopant activation increases with the implanted dose. Activation of 80%–90% is obtained from capacitance–voltage measuremen...

EFFECT OF BORON DIFFUSION ON THE HIGH-VOLTAGE BEHAVIOR OF 6H-SIC P+NN+ STRUCTURES

Boron diffusion can be used to compensate the n-type layer of a p(+)nn(+) 6H-silicon carbide structure in order to increase its high-voltage capabilities. Measurements under reverse biases for a current range from 10 to 500 mu A show that this process is very efficient for working temperatures about 300 K. Indeed we obtained a voltage of 670 V for a reverse current of 10 mu A instead of the 120 V calculated for a structure without boron diffusion. Nevertheless, the breakdown voltage decreases rapidly when the temperature increases. Capacitance measurements show that the measured doping level in the n-type layer evolves in the same way as the temperature (it ranges from 10(13) cm(-3) at 300 K to 10(17) cm(-3) at 500 K). A great concentration of boron seems to be responsible for this doping variation with temperature. Admittance spectroscopy reveals the presence of D centers at 0.62 eV above the valence band associated to boron at concentration similar or superior to nitrogen concentration in the n-type layer. The increase of the doping level with the temperature is responsible for this decrease of the breakdown voltage.

Modeling and high temperature characterization of SiC-JFET

Silicon Carbide (SiC) is considered as the wide band gap semiconductor material that can presently compete with silicon (Si) material for power switching devices. Compact circuit simulation models for SiC devices are of extreme importance for designing and analyzing converter circuit, in particular, if comparisons with Si devices should be performed. In this paper, three kinds of Silicon Carbide JFET samples were characterized at temperatures up to 225degC. The characterizations are based on the DC (Current - Voltage) characteristic measurements using a curve tracer and on the AC (Capacitance - Voltage) measurements using an impedance analyzer and on the switching characteristics using un clamped inductive load. The purpose is to establish an analytical model that is based on the physical and behavioural analysis of the SiC [JFET, taking into account the two physical channels and the influence of temperature. As shown, the model is validated with both steady State and transient characteristics. Validation of the model shows excellent agreement with measured data. The physical approach implemented in this model is crucial to describe the transient behaviour over a wide range of application conditions and temperatures. This model will be used later in the design of a power converter.

Determination of ionization energies of the nitrogen donors in 6H‐SiC by admittance spectroscopy

The nitrogen donor levels have been studied by admittance spectroscopy between 20 and 200 K in Schottky barriers made on lightly n‐type epitaxial 6H‐SiC layers. Measurements at different frequencies yield different freezeout temperatures which in turn are used to determine the donor level energies. Two electron traps at Ec−0.082 eV and at Ec−0.140 eV were detected. These levels are associated with nitrogen, respectively, at the hexagonal sites for the former and at the cubic sites for the latter level.

High temperature characterization of SiC-JFET and modelling

Silicon Carbide (SiC) is considered as the wide band gap semiconductor material that can presently compete with Silicon (Si) material for power switching devices. Compact circuit simulation models for SiC devices are of extreme importance for designing and analyzing converter circuit, in particular, if comparisons with Si devices should be performed. In this paper, three different kinds of Silicon Carbide JFET samples were characterized at temperatures up to 225degC. The characterization is based on the DC (Current - Voltage) characteristic measurements using a curve tracer and on the AC (Capacitance - Voltage) measurements using an impedance analyzer. We keep in mind to establish an analytical model that will be used in the design of a power converter.

Determination of donor and acceptor level energies by admittance spectroscopy in 6H SiC

Abstract Admittance and deep level transient spectroscopy (DLTS) measurements were taken on n- and p-type Schottky diodes in order to determine the activation energies of both shallow (aluminium and nitrogen) and deep levels in 6H SiC epitaxial layers. A dependence on the lattice sites is found for N and suggested for Al. For N the activation energies are 82 and 137 meV in the hexagonal and cubic sites respectively. For Al, the values could be 0.22 and 0.25 eV respectively. DLTS analysis shows the presence of deep levels in low concentrations. Finally, we show that assuming a two-level structure of the doping impurities, the carrier concentration can be well predicted as a function of temperature so that it is possible, from current-voltage measurements of junction field effect transistors, to determine the power law dependence of mobility on temperature in n-type material.

Calculation of theoretical capacitance–voltage characteristics of 6H–SiC metal–oxide–semiconductor structures

The effect of nonuniform interface trap distributions on capacitance–voltage (C–V) characteristics of 6H–silicon carbide metal–oxide–semiconductor (MOS) capacitors has been investigated. Theoretical C–V curves have been calculated in order to study the influence of: (i) the nature (donor or acceptor) of the traps, (ii) the interface state density peak in the band gap and the peak magnitude. The incomplete ionization of dopants and the depletion in the polysilicon gate have also been taken into account to fit experimental data. A good agreement is observed between the interface state spectrum obtained in our calculation and the one obtained by the Terman’s method. Thus, exact parameters of the MOS structures can be obtained. A peak of donor states is detected at Ev+0.65u200aeV, and an effective oxide charge is measured to 4.9×1012u200acm−2, which denotes a poor SiO2–SiC interface quality.