Jeffrey Fan

Temperature Control Framework Using Wireless Sensor Networks and Geostatistical Analysis for Total Spatial Awareness

This paper presents a novel framework for intelligent temperature control in smart homes using Wireless Sensor Networks (WSN) and geostatistical analysis for total spatial awareness. Sampled temperature readings from sensor nodes have the ability to inform the system on temperatures at specific locations. However, these locations where readings are taken do not completely describe the area under consideration. To solve this issue, geostatistical techniques are utilized, which include variography and kriging to predict temperature where measurements are not available. This added information would allow the system to control cooling and heating mechanisms in buildings at every location for improved user comfort.

Voltage drop reduction for on-chip power delivery considering leakage current variations

In this paper, we propose a novel on-chip voltage drop reduction technique for on-chip power delivery networks of VLSI systems in the presence of variational leakage current sources. The new method inserts decoupling capacitors (decaps) into the power grid networks to reduce the voltage fluctuation. The optimization is based on sensitivity-based conjugate gradientmethod and sequence of linear programming approach. Different from existing power grid noise reduction methods, the new approach considers the impacts of inter-die and intra-die variational leakage current sources due to unavoidable process variability during the decap optimization process for the first time. Leakage currents, which although are static in nature typically, can still add to the total voltage drops and dynamic voltage reduction thus must consider the leakage-induced voltage variations. The proposed algorithm exploits the relative constant variations for different decap configurations of power grid circuits to speed up the statistical optimization process. Decaps can be inserted in such a way that the resulting circuits have much higher probability to meet the voltage drop constraints in the presence of leakage current variations. Experimental results demonstrate the effectiveness of the proposed approach and show that the new method has 100X to 1,000X of speedup over the Monte Carlo based statistical decap optimization method.

Vector Bank Based Multimedia Codec System-on-a-Chip (SoC) Design

In this paper, we present a design architecture of implementing a ”Vector Bank” into video encoder system, namely, an H.264 encoder, in order to detect and analyze the moving objects within the specific area. Also, we believe that the transmitting bandwidth could be saved with the implementation of Vector Bank design. Motion Estimation is a common technology for today’s video codec. By abstracting the vector data from the Motion Estimation block using the motion detection method and with the application of Laplacian of Gaussian operator, we could obtain the object motion data generated by up to 16 reference frames. Thus, it could save the bandwidth, processing load, and memory resources dramatically.

Intrusion Aware System-on-a-Chip Design with Uncertainty Classification

In this paper, we have proposed a System-on-a-Chip (SoC) architectural design to avoid potential intrusion or attacks from external devices. Either using misuse detection or anomaly detection techniques to design intrusion detection systems, a large amount of traffic data is needed to be collected in advance for analysis. However, it is not feasible in the limited resources available in SoC systems. We propose to incorporate fuzzy clustering technique along with Dempster-Shafer theory into our intrusion detection design to solve uncertainty problems caused by ambiguous and limited information. Also, the k-NN technique is applied to speed up the detection process. We compare the results of our proposed approach with those of k-NN classifier, fuzzy k-NN classifier and evidence-theoretic k-NN classifier. It indicates that our approach is able to achieve higher detection rates than those from the other three classifiers, thus is more useful in the implementation of intrusion aware mechanism in SoC design.

Mixed-signal System-on-a-Chip (SoC) verification based on SystemVerilog model

Simulation speed and a lack of test approaches are the main difficulties in the mixed-signal verification of a complex System-on-a-Chip (SoC). In this paper, an equivalent high-level Radio Frequency (RF) model is created by the SystemVerilog language and integrated into a mixed-signal SoC. Such a model can be executed on a digital simulator, which is dramatically faster than the traditional method using an analog solver. Some mixed-signal verification approaches based on digital methods (including constrained random data generation, assertion-based verification, coverage-driven verification, and Verification Methodology Manual) are also presented as well as a case on the integrated SoC.

Passive Rational Interpolation-Based Reduction via Carathéodory Extension for General Systems

Passive reduction of interconnects requires the system to be described in the so-called passive form, which limits the application of existing approaches. Passive reduction of a dynamic system in general structure form still remains a difficult problem, and existing solutions are expensive. This brief presents a novel rational interpolation-based reduction framework for reducing the dynamic systems described in any internal structure. The new method is based on the Carathéodory extension, which ensures that the interpolating function is passive without any restriction on the circuit structure. As an explicit moment-matching method, it has a similar computational cost as the Krylov-subspace-based reduction methods and is very efficient to reduce the large systems whose input-output behavior can be approximated by a small number of moments.

Volterra series based signal processing on integrated communication systems

In this paper, we present a novel behavior frequency domain modeling in application to modern communication systems to describe the third order inter-modulation distortions and harmonic distortions in high frequency signal processing environments based on Volterra series. By using model order reduction techniques, we are able to speed up the simulation time. Two basic model structures including a frequency shaping block and a resistive nonlinear gain block are analyzed. A compositional model based on the proposed two basic models is presented. Different cascade strategy is also discussed. The proposed compositional model achieves simulation results within 6% error on average in comparison with the results from Spectre simulator.

Integration and Implementation of Secured IP Based Surveillance Networks

This paper presents a method of integration and implementation of transmitting video and audio data from multiple Internet protocol (IP) surveillance cameras in a wireless sensor network to a centralized management unit (central node) using real time streaming protocol (RTSP). The wireless network is based on ldquostarrdquo topology by using the IEEE 802.11 series of standards in wireless local area networks (WLAN). Security for wireless communications between the sensors and central node is achieved in real-time through the proposed uncertainty classification of network traffic with little and negligible run-time overhead for hacker or threat detection. A correlation-based feature selection algorithm is utilized in the central node for improved intrusion detection speed and accuracy by eliminating redundant and irrelevant features in the feature space. Uncertainty problems are solved using the fuzzy belief k-nearest neighbours (k-NN) intrusion detector, which incorporates the fuzzy clustering technique with the Dempster-Shafer theory. Also, the detection process is made more efficient using the k-NN technique. Experimental results show up to 94% detection rate of potential threats and intrusions, which indicate a significant performance increase compared with three other classifiers.

High accuracy three-dimensional radar sensor design based on fuzzy logic control approach

A radar sensor is used to determine the speed of a moving object. This function is made possible by the Doppler effect. However, relying on single radar sensor can have some shortcomings; for instance, (1) A single radar sensor can only accurately measure the speed of a target that is moving either directly towards or away from the sensor, and (2) Only one reading from each trigger can be obtained. In this paper, a novel three-dimensional radar system is proposed to address these disadvantages in target tracking. Furthermore, a fuzzy logic controller is proposed to minimize the error between the measured and actual speed. Experimental results show that such a system can improve tracking of the object with 10X better in error reduction in terms of accuracy and signal noise.

Communications via Systems-on-Chips Clustering in Large-Scaled Sensor Networks

In this paper, we have proposed a framework of systems-on-chips clustering in application to complicated sensor networks. The framework can be applied to address the communication issues in distributed and large-scaled sensor nodes in wireless sensor network application. There are two communication categories under consideration, i.e. intra-nodes and inter-nodes. Due to the potentially higher frequency in the signal propagation within the sensor node, the characteristics of the interconnect among various systems-on-chips cannot be described in the traditionally lumped R, L, C components. We adapt a distributed transmission line model to address such issues and possibly improve the reliability in the intra-nodes communication. Furthermore, based on the bandwidth requirements of each sensor node, the large-scaled senor network is proposed to be transformed into a maze diagram by a user defined threshold bandwidth, so that many existing approaches may be applied to determine the routing paths in the inter-nodes communication to improve the efficiency of the overall network.