Boyuan Yan

Simulation of large neuronal networks with biophysically accurate models on graphics processors

Efficient simulation of large-scale mammalian brain models provides a crucial computational means for understanding complex brain functions and neuronal dynamics. However, such tasks are hindered by significant computational complexities. In this work, we attempt to address the significant computational challenge in simulating large-scale neural networks based on biophysically plausible Hodgkin-Huxley (HH) neuron models. Unlike simpler phenomenological spiking models, the use of HH models allows one to directly associate the observed network dynamics with the underlying biological and physiological causes, but at a significantly higher computational cost. We exploit recent commodity massively parallel graphics processors (GPUs) to alleviate the significant computational cost in HH model based neural network simulation. We develop look-up table based HH model evaluation and efficient parallel implementation strategies geared towards higher arithmetic intensity and minimum thread divergence. Furthermore, we adopt and develop advanced multi-level numerical integration techniques well suited for intricate dynamical and stability characteristics of HH models. On a commodity GPU card with 240 streaming processors, for a neural network with one million neurons and 200 million synaptic connections, the presented GPU neural network simulator is about 600X faster than a basic serial CPU based simulator, 28X faster than the CPU implementation of the proposed techniques, and only two to three times slower than the GPU based simulation using simpler phenomenological spiking models.

Second-Order Balanced Truncation for Passive-Order Reduction of RLC K Circuits

In this paper, we propose a novel model-order reduction (MOR) approach, second-order balanced truncation (BT) for passive-order reduction (SBPOR), which is the first second-order BT method proposed for passive reduction of RLCK circuits. By exploiting the special structure information in the circuit formulation, second-order Gramians are defined based on a symmetric first-order realization in descriptor from. As a result, SBPOR can perform the traditional balancing with passivity-preserving congruency transformation at the cost of solving one generalized Lyapunov equation. Owing to the second-order formulation, SBPOR also preserves the structure information inherent to RLCK circuits. We further propose, second-order Gramian approximation (SOGA) version of SBPOR , to mitigate high computational cost of solving Lyapunov equation. Experimental results demonstrate that SBPOR and SOGA are globally more accurate than the Krylov subspace based approaches.

Decoupling for power gating: sources of power noise and design strategies

Power gating is essential for controlling leakage power dissipation of modern chip designs. However, power gating introduces unique power delivery integrity issues and tradeoffs between switching and rush current (wake-up) supply noises. In addition, in power-gated power delivery networks (PDNs), the amount of power saving intrinsically trades off with power integrity. In this paper, we propose systemic decoupling capacitance optimization strategies that optimally balance between switching and rush current noises, and tradeoff between power integrity and wake-up time, hence power saving. Furthermore, we propose a novel re-routable decoupling capacitance concept to break the tight interaction between power integrity and power saving, providing further improved tradeoffs between the two. Our design strategies have been implemented in a simulation-based optimization flow and the conducted experimental results have demonstrated significant improvement on leakage power saving through the presented techniques.

Stability assurance and design optimization of large power delivery networks with multiple on-chip voltage regulators

Distributive on-chip voltage regulation is appealing to solving the power integrity problems in nowadays high-end SoCs. Nevertheless, ensuring the stability of large-scale power delivery networks regulated by a multiplicity of voltage regulators is challenging due to the size of the system and complex interactions between the regulators and the large loading network. We present a theoretically elegant framework that provides a rigorous guarantee for network stability. We further develop a practical design approach that largely decouples the design of linear voltage regulators from that of the complex load, making it feasible to ensure the stability of the complete network. The presented design approach has been successfully applied to several design examples with guaranteed stability and competitive performances.

An efficient terminal and model order reduction algorithm

The paper proposes an efficient terminal and model order reduction method for compact modeling of interconnect circuits with many terminals. The new method is inspired by the recently proposed terminal reduction method, SVDMOR [P. Feldmann, F. Liu, Sparse and efficient reduced order modeling of linear subcircuits with large number of terminals, in: Proceedings of the International Conference on Computer Aided Design (ICCAD), 2004, pp. 88-92]. But different from SVDMOR, the new method considers higher order moment information for terminal responses during the terminal reduction and separately applies singular value decomposition (SVD) on both input and output terminals for low-rank approximations. This is in contrast to the SVDMOR method where input and output terminal responses are approximated by SVD at the same time, which can lead to large errors when the numbers of inputs and outputs are quite different. We analyze the passivity requirements for SVD-based terminal and model order reduction and show that the combined passive terminal and MOR using SVD method will not lead an effective terminal reduction in general. Our experimental results show that the proposed ESVDMOR method outperforms the SVDMOR method in terms of accuracy for the same reduced model sizes when the numbers of input and output terminals are quite different.

The emergence of abnormal hypersynchronization in the anatomical structural network of human brain

Brain activity depends on transient interactions between segregated neuronal populations. While synchronization between distributed neuronal clusters reflects the dynamics of cooperative patterns, the emergence of abnormal cortical hypersynchronization is typically associated with spike-wave discharges, which are characterized by a sudden appearance of synchronous around 3Hz large amplitude spike-wave discharges of the electroencephalogram. While most existing studies focus on the cellular and synaptic mechanisms, the aim of this article is to study the role of structural connectivity in the origin of the large-scale synchronization of the brain. Simulating oscillatory dynamics on a human brain network, we find the space-time structure of the coupling defined by the anatomical connectivity and the time delays can be the primary component contributing to the emergence of global synchronization. Our results suggest that abnormal white fiber connections may facilitate the generation of spike-wave discharges. Furthermore, while neural populations can exhibit oscillations in a wide range of frequency bands, we show that large-scale synchronization of the brain only occurs at low frequencies. This may provide a potential explanation for the low characteristic frequencies of spike-wave discharges. Finally, we find the global synchronization has a clear anterior origin involving discrete areas of the frontal lobe. These observations are in agreement with existing brain recordings and in favor of the hypothesis that initiation of spike-wave discharges originates from specific brain areas. Further graph theory analysis indicates that the original areas are highly ranked across measures of centrality. These results underline the crucial role of structural connectivity in the generation of spike-wave discharges.

Localized Stability Checking and Design of IC Power Delivery With Distributed Voltage Regulators

Placing multiple voltage regulators onto the die is an effective way of enabling distributed on-chip voltage regulation and provides significant benefits in suppressing various types of power supply noise. However, the complex interactions between the active voltage regulators and the large passive subnetwork may render the complete power delivery network (PDN) unstable, leading to design failures. While traditional stability measures such as phase margin are not applicable to regulated PDNs that have a large number of loops, a brute-force analysis of network stability can be impractical due to the high complexity of a given PDN. We present a hybrid stability margin concept and the associated stability-checking method for PDNs with integrated linear low-dropout voltage regulators (LDOs). With theoretical rigor, the proposed approach is local in the sense that the stability of the entire network can be efficiently examined through a hybrid stability constraint that is defined locally for individual LDOs. In the same spirit, we propose a localized LDO design methodology that optimizes individual LDOs in a stand-alone manner while ensuring the network-level stability. Key circuit-level design considerations and tradeoffs involved in stability-ensuring LDO design are also discussed.

Decentralized and Passive Model Order Reduction of Linear Networks With Massive Ports

It is well known that model order reduction for circuits with many terminals remains a challenging problem. One reason is that existing approaches are based on a centralized framework, in which each input-output pair is implicitly assumed to be equally interacted and the matrix-valued transfer function is assumed to be fully populated. In this paper, we attempt to address this long-standing problem using a decentralized model order reduction scheme, in which a multi-input multi-output system is decoupled into a number of subsystems and each subsystem corresponds to one output and several dominant inputs. The decoupling process is based on the relative gain array, which measures the degree of interaction of each input-output pair. For each decoupled subsystem, passive reduction can be easily achieved using existing reduction techniques. The proposed method is suitable for resistance-dominant interconnects such as on-chip power grids, substrate planes where extremely compact models can be obtained. Simulation results demonstrate the advantage of the proposed method compared to the existing approaches.

An Extended SVD-based Terminal and Model Order Reduction Algorithm

The paper proposes a new combined terminal and model order reduction method for compact modeling of interconnect circuits. The new method extends the existing SVDMOR method by using higher order moment information for terminal responses during the terminal reduction and by applying separate SVD low-rank approximations on input and output terminals respectively. This is in contrast to SVDMOR method where input and output terminal responses are SVD approximated at the same time, which can lead to large error when the numbers of inputs and outputs are quite different. We analyze the passivity requirement for combined terminal and model order reduction and show the passivity enforcement may significantly hamper the terminal reduction effects. We also improve the computation efficiency of SVDMOR. Our experimental results show that ESVDMOR outperforms the SVDMOR in terms of accuracy for the similar reduced model sizes in a number of interconnect circuits when the input and output terminals are different

Reduced order modeling of passive and quasi-active dendrites for nervous system simulation

Accurate neuron models at the level of the single cell are composed of dendrites described by a large number of compartments. The network-level simulation of complex nervous systems requires highly compact yet accurate single neuron models. We present a systematic, numerically efficient and stable model order reduction approach to reduce the complexity of large dendrites by orders of magnitude. The resulting reduced dendrite models match the impedances of the full model within the frequency range of biological signals and reproduce the original action potential output waveforms.