Jeffrey R. Jessing
Boise State University
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Featured researches published by Jeffrey R. Jessing.
workshop on microelectronics and electron devices | 2004
P.S. Reddy; Jeffrey R. Jessing
Precise alignment of the mask patterns relative to wafer crystallographic orientation is critical in the fabrication of many MEMS devices. Slight misalignment between the two can create striations and other defects in the etched sidewalls using an orientation dependent etchant such as potassium hydroxide (KOH). This paper focuses on the characterization of the resultant geometries due to the deliberate misalignment of photolithographically defined patterns relative to the [110] plane in (100) orientation silicon. The surface roughness of the etched (111) sidewall are characterized using optical microscopy, scanning electron microscopy and profilometry.
Journal of Vacuum Science & Technology B | 1998
Jeffrey R. Jessing; H.R. Kim; Donald L. Parker; Mark H. Weichold
Gated porous silicon cathode field emission arrays have been fabricated. The devices were fabricated by using a simple self-aligning gate process which results in reproducible physical characteristics across the entire array. In addition, an anodization process has been developed to form porous silicon in a localized region on the substrate. The resulting device structure consists of a conical porous silicon tip that is self-aligned with respect to a concentric metal gate electrode. Small arrays exhibited Fowler–Nordheim characteristics over several decades of anode current. The porous silicon tip has been shown to produce a large submicroscopic field enhancement which leads to an improvement in emission characteristics.
biennial university government industry microelectronics symposium | 2003
T. Vamsi Krishna; Jeffrey R. Jessing; Dale D. Russell; Jonathan Scaggs; Lisa R. Warner; Joe A. Hartman
Water-borne pollutants such as volatile organic compounds are a serious environmental concern, which has increased the demand for chemical sensing elements. Solid-state sensors based on catalytic gate devices are a subject of current research, however they are restricted in practical applications because of their inability to operate at room temperature. Conducting polymer FETs, which employ a conducting gate polymer, have received much attention due to their unique electronic and optical properties. Polythiophene is chosen as the semi-conductive gate polymer in this work. A functional group attached to the polythiophene is used to detect analytes (i.e., mercury in this work) of interest. The selectivity of the derivitized polythiophene to mercury can be rationalized based on the size of the ring, presence of oxygen and nitrogen donor atoms. In this paper, the modeling and design of a polythiophene gate electrode ChemFET will be discussed. Specifically the model development and resultant device simulations using Silvaco TCAD will be presented. Using this model various current-voltage characteristics of the ChemFET corresponding to parameters such as substrate doping, gate oxide thickness, various gate stacks, and device geometries are presented.
Journal of Vacuum Science & Technology B | 1999
Hong-Ryong Kim; Jeffrey R. Jessing; Donald L. Parker
The electrical characteristics of porous silicon field emitter arrays (PSFEAs) was studied. The surface of silicon field emitters was modified by electrochemical etching with HF: ethanol solution. Porous silicon consists of a high density of submicroscopic fibrils which serve as increased emission sites per tip, hence significantly improving the emission characteristics. PSFEAs exhibited low turn-on voltage and high emission current with small current fluctuation and good reproducibility.
international vacuum microelectronics conference | 1995
Jeffrey R. Jessing; Donald L. Parker; Mark H. Weichold
This paper will address the development of a porous silicon cathode technology which shows promise in solving the existing problems, specifically the unstable, low current density, non-reproducible and high voltage emission, encountered by other cathode technologies. Monolithic two- and three-terminal devices have been designed, manufactured, and characterized. All of these devices have resulted in stable, reproducible operating characteristics that follow the Fowler-Nordheim model. Vacuum transport of the electrons and temperature independence (to 250/spl deg/C) of the I-V characteristics have been confirmed. Appreciable emission current has been observed with macroscopic fields on the order of 10/sup 4/ V/cm, thus indicating a large submicroscopic field enhancement due to the geometrical nature of the porous silicon.
workshop on microelectronics and electron devices | 2004
Gregory S. Gatlin; Cory W. Eskridge; Jacob M. Brinkerhoff; Jared D. Fife; Jeffrey R. Jessing
This paper compares the processes of photolithography and electron beam lithography (EBL). In addition, we discuss the procedure used to implement EBL in a university laboratory, specifically Boise State Universitys (BSU) Idaho Microfabrication Laboratory (IML).
international conference on vacuum microelectronics | 1997
H.R. Kim; Jeffrey R. Jessing; Donald L. Parker
In this research, we applied the physical and electrical characteristics of porous silicon to enhance the performance of jield emission devices. The surface of silicon jield emitters have been modified by chemical etching with HF:HN03:H20 solution, and electrochemical etching with HF:ethanol solution. The emitter surface became roughened and had nano-scale fibrils over the emitter surface in both cases. We found PS thin films prepared by chemical etching of Si field emitters also gave similar field enhancement efiects as does electrochemically formed PS. Porous silicon contributed to the increase of the emission current, the reduction of operating voltage, the improvement of the un formity of the emission characteristics between the emitters and the reduction of the probability of emitter failure during operation. I. INTRODUCTION Recent studies on developing field emission devices for practical use have been focused on achieving high emission current at a low voltage [l-31 Emission from field emitters depends on the geometrical shape of the tips, and the surface conditions of the tips, and the cathode materials Porous silicon (PS) can be another field enhancement method due to its nano-scale physical structure [4, 51 PS has been investigated as an insulating material (SOI) in the field of VLSI Since the discovery of visible photoluminescence from PS at room temperature in 1990 by Canham, much attention has been given to the optical properties of PS [6] Particularly, photoluminescence (PL) and electroluminescence (EL) from porous silicon at room temperature have attracted much attention because of their potential application for Si-based opto-electronic devices [7, 81 Thus far, PS thin films have been prepared mainly by electrochemical etching of silicon wafers It has been reported that porous silicon can be formed by either open-circuit etching (i e chemical stain etching), or electrochemical etching of the silicon Beale et al. studied the microstructure and the electrical characteristics of stain etched and electrochemical etched silicon and reported that the two methods produce a porous silicon having similar properties [9] Although electrochemical etching is more widely used to form PS, stain etching is simpler and can give similar advantages such as high emission current at a low operating voltage when it is applied to the field emission devices In this research, chemical etching of Si field emitter arrays (FEAs) was performed to improve the emission properties of a plain Si FEA In addition, a comparison was made with electrochemical etched FEAs 11. FABRICATION
international conference on vacuum microelectronics | 1997
Jeffrey R. Jessing; H.R. Kim; Donald L. Parker; Mark H. Weichold
Gatedporous silicon cathode field emission arrays have been fabricated. The devices were fabricated by using a simple self-aligning gate process which results in reproducible physical characteristics across the entire array. In addition, an anodization process has been developed to form porous silicon in a localized region on the substrate. The resulting device structure consists of a conical porous silicon t@ that is self-aligned with respect to a concentric metal gate electrode. Small arrays exhibited Fowler-Nordheim characteristics over several decades of anode current. The porous silicon t@ has been shown to produce a large submicroscopic Jield enhancement which leads to an improvement in emission characteristics.
International Symposium for Testing and Failure Analysis, Santa Clara, CA (US), 11/14/1999--11/18/1999 | 1999
Marsha T. Abramo; Nicholas Antoniou; Ann N. Campbell; Daniel M. Fleetwood; Charles E. Hembree; Jeffrey R. Jessing; Jerry M. Soden; Scot E. Swanson; Paiboon Tangyunyong; William E. Vanderlinde
IEEE Nuclear and Space Radiation Effects Conference, Reno, NV (US), 07/24/2000--07/28/2000 | 2000
Ann N. Campbell; Charles E. Hembree; Paiboon Tangyunyong; Jeffrey R. Jessing; Jerry M. Soden