JengPing Lu

Active pixel imagers incorporating pixelâ level amplifiers based on polycrystallineâ silicon thinâ film transistors

Active matrix, flat-panel imagers (AMFPIs) employing a 2D matrix of a-Si addressing TFTs have become ubiquitous in many x-ray imaging applications due to their numerous advantages. However, under conditions of low exposures and/or high spatial resolution, their signal-to-noise performance is constrained by the modest system gain relative to the electronic additive noise. In this article, a strategy for overcoming this limitation through the incorporation of in-pixel amplification circuits, referred to as active pixel (AP) architectures, using polycrystalline-silicon (poly-Si) TFTs is reported. Compared to a-Si, poly-Si offers substantially higher mobilities, enabling higher TFT currents and the possibility of sophisticated AP designs based on both n- and p-channel TFTs. Three prototype indirect detection arrays employing poly-Si TFTs and a continuous a-Si photodiode structure were characterized. The prototypes consist of an array (PSI-1) that employs a pixel architecture with a single TFT, as well as two arrays (PSI-2 and PSI-3) that employ AP architectures based on three and five TFTs, respectively. While PSI-1 serves as a reference with a design similar to that of conventional AMFPI arrays, PSI-2 and PSI-3 incorporate additional in-pixel amplification circuitry. Compared to PSI-1, results of x-ray sensitivity demonstrate signal gains of approximately 10.7 and 20.9 for PSI-2 and PSI-3, respectively. These values are in reasonable agreement with design expectations, demonstrating that poly-Si AP circuits can be tailored to provide a desired level of signal gain. PSI-2 exhibits the same high levels of charge trapping as those observed for PSI-1 and other conventional arrays employing a continuous photodiode structure. For PSI-3, charge trapping was found to be significantly lower and largely independent of the bias voltage applied across the photodiode. MTF results indicate that the use of a continuous photodiode structure in PSI-1, PSI-2, and PSI-3 results in optical fill factors that are close to unity. In addition, the greater complexity of PSI-2 and PSI-3 pixel circuits, compared to that of PSI-1, has no observable effect on spatial resolution. Both PSI-2 and PSI-3 exhibit high levels of additive noise, resulting in no net improvement in the signal-to-noise performance of these early prototypes compared to conventional AMFPIs. However, faster readout rates, coupled with implementation of multiple sampling protocols allowed by the nondestructive nature of pixel readout, resulted in a significantly lower noise level of approximately 560 e (rms) for PSI-3.

Short channel effects in regioregular poly(thiophene) thin film transistors

The effects of the physical channel length on the current-voltage characteristics of thin film transistors (TFTs) made with poly[5,5′-bis(3-dodecyl-2-thienyl)-2,2′-bithiophene] were examined. Coplanar transistors with fully patterned electrodes on insulating substrates and with a common gate structure on thermal oxide were fabricated. The output characteristics of TFTs with channel lengths shorter than 10μm showed the presence of a parasitic contact resistance and the lack of current saturation. The origin of these nonidealities was examined by the application of models that included self-heating effects and breakdown of the channel region at high applied biases. The analysis suggests that carriers can break away from the channel at high bias voltages and flow through a bulk region of the semiconducting film leading to higher currents than otherwise expected.

Amorphous silicon thin-film transistors and arrays fabricated by jet printing

Phase-change wax-based printed masks, in place of conventional photolithography, were used to fabricate hydrogenated amorphous silicon thin-film transistors (TFTs). Wax-mask features with a minimum feature size of ∼20 μm were achieved using an acoustic-ink-printing process. Both discrete and matrix addressing structured bottom-gate TFTs with source–drain contacts overlapping the channel were created using a four-mask process. The TFTs had current–voltage characteristics comparable to photolithographically patterned devices, with mobility of 0.6–0.9 cm2/V s, threshold voltage of 2–3 V, and on/off ratios exceeding 107 for devices with channel lengths below 50 μm.

Hydrogenated amorphous silicon thin-film transistor arrays fabricated by digital lithography

A jet-printed digital-lithographic method, in place of conventional photolithography, was used to fabricate 64 /spl times/ 64 pixel (300 /spl mu/m pitch) matrix addressing thin-film transistor (TFT) arrays. The average hydrogenated amorphous silicon TFT device within an array had a threshold voltage of /spl sim/3.5 V, carrier mobility of 0.7 cm/sup 2//V/spl middot/s, subthreshold slope of 0.76 V/decade, and an on/off ratio of 10/sup 8/.

High resolution X-ray imaging using amorphous silicon flat-panel arrays

Two dimensional amorphous silicon arrays are the emerging technology for digital medical X-ray imaging. This paper demonstrates an improved pixel design compared with the current generation of imagers. The geometry of the pixel sensor has been extended from a mesa isolated structure into a continuous layer above the readout structures of the array. This approach improves sensitivity to visible light, and to X-ray illumination when coupled with a conversion phosphor. Furthermore, this 3-dimensional geometry allows for the fabrication of the finest pitch amorphous silicon array yet manufactured, with a pixel size of 64 /spl mu/m square. A test array (512/spl times/640 pixels) has been fabricated and tested which demonstrates the success of this approach.

From Printed Transistors to Printed Smart Systems

Printing as a manufacturing technique is a promising approach to fabricate low-cost, flexible, and large area electronics. Over the last two decades, a wide range of applications has been explored, among them displays, sensors, and printed radio-frequency identification devices. Some of these turned out to be challenging to commercialize due to the required infrastructure investment, accuracy or performance expectations compared to incumbent technologies. However, the progress in terms of material science, device, and process technology now makes it possible to target some realistic applications such as printed sensor labels. The journey leading to this exciting opportunity has been complex. This review describes the experience and current efforts in developing the technology at PARC, a Xerox Company. Printed smart labels open up low-cost solutions for tracking and sensing applications that require high volumes and/or would benefit from disposability. Examples include radiation tags, one-time use medical sensors, tracking the temperature of pharmaceuticals at the item level, and monitoring food sources for spoilage and contamination. Higher performance can be achieved with printed hybrid electronics, integrating microchip-based signal processing, wireless communication, sensing, multiplexing, as well as ancillary passive elements for low-profile microelectronic devices, opening up further applications. This technology offers custom circuitry for demanding applications and is complementary to mass printed transistor circuits. As an example, we describe a prototype sense-and-transmit system, focusing particularly on issues of integration, such as impedance matching between the sensor and circuits, robust printed interconnection of the chips, and compatible interface electronics between printed and discrete parts. Next-generation technologies will enable printing of entire smart systems using microchip inks. A new printing concept for the directed assembly of silicon microchips into functional circuits is described. The process is scalable and has the potential to enable additive, digital manufacturing of high-performance electronic systems.

Flat panel imagers with pixel level amplifiers based on polycrystalline silicon thin-film transistor technology

We report here the realization of a large-area compatible, flat panel imager with pixel level amplifiers. The imager is based on excimer-laser crystallized, polycrystalline silicon (poly-Si) thin-film transistors. By incorporating pixel level amplification, flat panel imagers are expected to be able to achieve unprecedented noise performance, with the hope of achieving single photon detection. We have demonstrated good noise performance of 1300 erms, exceeding the commonly accepted industry standard of 2000 erms. We also briefly discuss the source of the extra noise, as well as the possibility of further reducing the noise level.

Hybrid Amorphous and Polycrystalline Silicon Devices For Large-Area Electronics

Distinct features of amorphous and polycrystalline silicon are attractive for large-area electronics. These features can be utilized in a hybrid structure which consists of both amorphous and polycrystalline silicon materials. For example, an extension of active matrix technology is the integration of peripheral drivers for the improvement of reliability, cost reduction and compactness of the packaging for large-area electronics. This goal can be approached by a combination of amorphous silicon pixel switches and polysilicon drivers. A monolithic fabrication process has been developed based on a simple modification of the amorphous silicon transistor process which uses selective area laser crystallization. This approach allows us to share many of the process steps involved in making both the amorphous and polysilicon devices. Another example of the hybrid device structure is a self-aligned amorphous silicon thin film transistor with polysilicon source and drain contacts. The advantages of the self-aligned transistor are reduction of the parasitic capacitance and scaling down of the device dimension. With a selective laser doping technique, self-aligned and shortchannel amorphous silicon thin film transistors have been demonstrated.

High Resolution, High Fill Factor A-SI:H Sensor Arrays for Optical Imaging

Amorphous silicon large area sensor arrays are in production for x-ray medical imaging. The most common pixel design works very well for many applications but is limited in spatial resolution because the available sensor area (the fill factor) vanishes in small pixels. One solution is a 3-dimensional structure in which the sensor is placed above the active matrix addressing. However, such high fill factor designs have previously introduce cross talk between pixels. We present data for a design in which the a-Si:H p-i-n photodiode sensor layer has a continuous i-layer and top p + -layer, and a patterned n + -layer contact to the pixel. Arrays of 64 μm and 75μm pitch have been fabricated and are the highest resolution a-Si:H arrays reported to date. The resolution matches the pixel size, and sensitivity has been improved by the high fill factor. Comparison is made between arrays with standard TFTs and TFTs with self-aligned source and drain contacts. Data line capacitance is improved by use of the self-aligned contacts. Measurements are included on the contact to bias capacitance. The high fill factor design greatly suppresses lateral leakage currents, while retaining ease of processing. Provided illumination levels remain below saturation, the resolution matches expectation for the pixel size.

Active matrix of amorphous silicon multijunction color sensors for document imaging

An integrated color image sensor, made entirely with amorphous silicon (a-Si:H) large-area technology, is presented. The a-Si:H based sensor is a double-junction p-i-n-i-p photodiode that discriminates two spectral bands according to the bias voltage. The active-matrix addressed array has 512×512 pixels with 75 μm pixel pitch and uses thin-film transistors as pixel switches. The array structure and the spectral response are discussed, and color images taken by the system using two bias voltages demonstrate the compatibility of color sensors with large-area active-matrix addressing techniques.