Jeong In Lee

Structural evolution of tunneling oxide passivating contact upon thermal annealing

We report on the structural evolution of tunneling oxide passivating contact (TOPCon) for high efficient solar cells upon thermal annealing. The evolution of doped hydrogenated amorphous silicon (a-Si:H) into polycrystalline-silicon (poly-Si) by thermal annealing was accompanied with significant structural changes. Annealing at 600 °C for one minute introduced an increase in the implied open circuit voltage (Voc) due to the hydrogen motion, but the implied Voc decreased again at 600 °C for five minutes. At annealing temperature above 800 °C, a-Si:H crystallized and formed poly-Si and thickness of tunneling oxide slightly decreased. The thickness of the interface tunneling oxide gradually decreased and the pinholes are formed through the tunneling oxide at a higher annealing temperature up to 1000 °C, which introduced the deteriorated carrier selectivity of the TOPCon structure. Our results indicate a correlation between the structural evolution of the TOPCon passivating contact and its passivation property at different stages of structural transition from the a-Si:H to the poly-Si as well as changes in the thickness profile of the tunneling oxide upon thermal annealing. Our result suggests that there is an optimum thickness of the tunneling oxide for passivating electron contact, in a range between 1.2 to 1.5 nm.

Use of antireflection layers to avoid ghost plating on Ni/Cu plated crystalline silicon solar cells

Screen printing is a method commonly used for making electrodes for crystalline silicon solar cells. Although the screen-printing method is fast and easy, screen-printed electrodes have a porous structure, high contact resistance, and low aspect ratio. On the other hand, plated electrodes have low contact resistance and narrow electrode width. Therefore, the plating method could be substituted for the screen-printing method in crystalline silicon solar cells. During the plating process, ghost plating can appear at the surface when the quality of the passivation layer is poor, causing an increase in the recombination rate. In this paper, light-induced plating was applied to the fabrication of electrodes, and various passivation layers were investigated to remove ghost plating in crystalline silicon solar cells. These included, (1) SiNx deposited by plasma-enhanced chemical vapor deposition (PECVD), (2) a double SiNx layer formed by PECVD, (3) a double layer with thermal silicon oxide and SiNx deposited by PECVD, and (4) a double layer comprising SiNx and SiOx formed by PECVD. For the plated solar cells, a laser was used to remove various antireflection coating (ARC) layers and phosphoric acid was spin-coated onto the doped silicon wafer prior to laser ablation. Also, a screen-printed solar cell was fabricated to compare plated solar cells with screen-printed solar cells. As a result, we found that a thermal SiO2/PECVD SiNx layer showed the lowest pinhole density and its wet vapor transmission rate was characterized. The solar cell with the thermal SiO2/PECVD SiNx layer showed the lowest J02 value, as well as improved Voc and Jsc.

Control of ghost plating by antireflection coating layer stacking on crystalline silicon solar cells

During the plating process, ghost plating could appear when the quality of the passivation layer is poor, and it causes an increase in the recombination rate. In this paper, light-induced plating was applied, and various passivation layers were investigated to remove ghost plating in crystalline silicon solar cells. These included, (1) SiN_x, (2) double SiN_x layer, (3) double layer with thermal silicon oxide and SiN_x and (4) double layer of SiN_x and SiO_x by PECVD. For the plated solar cells, a laser was used to remove various ARC layers and phosphoric acid was spin-coated onto the doped silicon wafer prior to laser ablation. As a result, a thermal SiO₂/PECVD SiN_x layer showed the lowest pinhole density and its wet vapor transmission rate was characterized. The solar cell with the thermal SiO2/PECVD SiNx layer showed the lowest J₀₂ value, as well as improved V_oc and J_sc.

Electrical and chemical characterization of Al 2 O 3 passivation layer deposited by plasma-assisted atomic layer deposition in c-Si solar cells

Aluminum oxide (Al₂O₃) film by atomic layer deposition (ALD) is known to supply excellent surface passivation properties on crystalline Si surface. In this study, 10 nm Al₂O₃ film was deposited on crystalline silicon by plasma-assisted atomic layer deposition (PAALD). To optimize concentration of hydrogen in Al₂O₃ film, deposited RF power was changed from 100 W to 900 W. Then, annealing and firing process were conducted. After annealing and firing, fixed charge in Al₂O₃ film was calculated by conductance-voltage measurement (C-V) and structure change was analyzed by XPS because the structure is related to fixed charge.

Removal of Laser Damage in Electrode Formed by Plating in Crystalline Silicon Solar Cells

In this paper, we investigated the electrical properties of crystalline silicon solar cell fabricated with Ni/Cu/Ag plating. The laser process was used to ablate silicon nitride layer as well as to form the selective emitter. Phosphoric acid layer was spin-coated to prevent damage caused by laser and formed selective emitter during laser process. As a result, the contact resistance was decreased by lower sheet resistance in electrode region. Low sheet resistance was obtained by increasing laser current, but efficiency and open circuit voltage were decreased by damage on the wafer surface. KOH treatment was used to remove the laser damage on the silicon surface prior to metalization of the front electrode by Ni/Cu/Ag plating. Ni and Cu were plated for each 4 minutes and 16 minutes and very thin layer of Ag with 1 μm thickness was plated onto Ni/Cu electrode for 30 seconds to prevent oxidation of the electrode. The silicon solar cells with KOH treatment showed the 0.2% improved efficiency compared to those without treatment.

Study on Improving Surface Structure with Changing RF Power Conditions in RIE (reactive ion etching)

A textured front surface is required in high efficiency silicon solar cells to reduce reflectance and to improve light trapping. Wet etching with alkaline solution is usually applied for mono crystalline silicon solar cells. However, alkali texturing method is not appropriate for multi-crystalline silicon wafers due to grain boundary of random crystallographic orientation. Accordingly, acid texturing method is generally used for multi-crystalline silicon wafers to reduce the surface reflectance. To reduce reflectivity of multi-crystalline silicon wafers, double texturing method with combination of acid and reactive ion etching is an attractive technical solution. In this paper, we have studied to optimize RIE condition by different RF power condition (100, 150, 200, 250, 300 W).