Hyo Sik Chang

Excellent thermal stability of Al2O3/ZrO2/Al2O3 stack structure for metal–oxide–semiconductor gate dielectrics application

The thermal stability of a nanolaminate (Al2O3/ZrO2/Al2O3) gate stack prepared by atomic layer chemical vapor deposition was investigated using medium-energy ion scattering spectroscopy, and x-ray photoelectron spectroscopy. We observed that the structure was stable up to 1000 °C under ultrahigh vacuum conditions. However, annealing in a nitrogen or oxygen ambient at 1 atm yielded the formation of an interfacial Zr–Al silicate layer at much lower temperatures. The growth of the interfacial silicate layer could be significantly reduced during furnace annealing via the use of plasma nitridation.

Electrical and Physical Properties of HfO2 Deposited via ALD Using Hf ( OtBu ) 4 and Ozone atop Al2 O 3

HfO 2 films were deposited via Hf(OtBu) 4 precursor and ozone oxidant using atomic layer deposition (ALD) atop Al 2 O 3 . We report the impact of annealing conditions on the physical and electrical properties of a HfO 2 on Al 2 O 3 /SiN/Si substrate using medium-energy ion scattering spectroscopy, high-resolution transmission electron microscopy, thermal desorption spectra, and electrical measurements. Annealing temperatures influence the microstructure and impurity levels of Hf(OtBu) 4 HfO 2 /Al 2 O 3 /SiN films. The leakage currents of Al 2 O 3 -HfO 2 bilayer were decreased with the increase of annealing temperature and the structures of the bilayer did not break until 850°C. This change was closely related to the reduction of carbon and organic contamination during annealing. However, annealing at 950°C drastically degraded electrical properties due to the intermixing of the HfO 2 -Al 2 O 3 bilayer structure.

Measurement of the physical and electrical thickness of ultrathin gate oxides

To evaluate the reliability in measurements of the thickness of ultrathin gate oxides in the range of 2–9 nm, various techniques based on different methodologies were used for comparison. The physical thickness was determined with medium energy ion scattering spectroscopy (MEIS), high-resolution transmission electron microscopy (HRTEM), and spectroscopic ellipsometry (SE). The physical thickness was compared with the electrical thickness measured with current–voltage (I–V) and capacitance–voltage (C–V) measurements with quantum effect corrections. The physical thickness of amorphous SiO2 layers in the range of 2–9 nm determined with MEIS and HRTEM is in a good agreement with the corresponding electrical thickness from C–V and I–V measurements within 0.3 nm. For SE, which is the main technique used for in-line monitoring, we observed that it can be used for 2–9 nm ultrathin gate oxides but is more sensitive to the details of the oxide characteristics.

Improved current performance of CMOSFETs with nitrogen incorporated HfO 2 -Al 2 O 3 laminate gate dielectric

For the first time, we integrated poly-Si gate CMOSFETs with nitrogen incorporated HfO/sub 2/-Al/sub 2/O/sub 3/ laminate (HfAlON) as gate dielectrics. Both low gate leakage currents (0.1 mA/cm/sup 2/ at V/sub g/=+1.0 V) and low EOT (15.6 /spl Aring/) sufficiently satisfy the specifications (EOT=12/spl sim/20 /spl Aring/, J/sub g/=2.2 mA/cm/sup 2/) estimated by ITRS for low power applications. By in-situ 3 step post-deposition annealing, approximately 17 at.% nitrogen is incorporated at the HfAlON/Si interface. In-situ 3 step post-deposition annealing decreases metallic Hf bonding, which exists at the HfO/sub 2/-Al/sub 2/O/sub 3/ laminate/Si interface. As a result, we can suppress C-V hysteresis and improve current performance. Finally, well-behaved 100 nm CMOSFET devices are achieved. The measured saturation currents at 1.2 V V/sub dd/ are 585 /spl mu//spl Aring///spl mu/m (I/sub off/= 10 nA//spl mu/m) for nMOSFET and 265 /spl mu/A//spl mu/m (I/sub off/=10 nA//spl mu/m) for pMOSFET, which are approximately 80% of those of nitrided SiO/sub 2/. In terms of I/sub on/-I/sub off/ characteristics of n/pMOSFETs, these results represent the best current performance compared with previous reports for poly-Si gate CMOSFETs with high-k gate dielectrics.

Atomic transport and stability during annealing of HfO2 and HfAlO with an ultrathin layer of SiO2 on Si(001)

A medium-energy ion scattering spectroscopy study has been carried out on HfO2/SiO2/Si and HfAlO/SiO2/Si stacks with 5-nm-thick dielectric layers prepared by atomic layer chemical vapor deposition at 300 °C. We observed that there are negligible interface strain and surface silicon for the as-deposited sample. After annealing in nitrogen, the crystallization of HfO2 started to occur between 500 °C and 600 °C. As the annealing temperature increased, a silicate layer is formed at the top of the HfO2 film. However, the HfAlO film with about 25% Al did not exhibit surface silicon and crystallization. Adding Al2O3 to HfO2 can suppress the existence of surface Si but can build up compressive strain at the oxide/Si interface layer. After annealing, excess Si that is prone to move may displace Al in order to relax the interface strain. On the other hand, HfAlO film exhibits much stronger resistance to oxygen diffusion than HfO2 and tends toward densification during N2 annealing.

Ultrathin nitrided-nanolaminate (Al2O3/ZrO2/Al2O3) for metal–oxide–semiconductor gate dielectric applications

An ultrathin nanolaminate (Al2O3/ZrO2/Al2O3) film prepared by atomic layer chemical vapor deposition was investigated for use in metal–oxide–semiconductor field effect transistor (MOSFET) gate dielectric applications. Based on transmission electron microscopy and medium-energy ion scattering spectroscopy (MEIS) analysis, an abrupt interface between stoichiometric top-layer Al2O3 and ZrO2 was found. Interfacial layers such as Zr–Al–O and Al–Si–O were also observed. An electrical equivalent oxide thickness as thin as 10.2 A with a quantum mechanical correction was obtained. Additional plasma nitridation of nanolaminte in N2 led to a significant reduction in the interfacial oxidation of nanolaminate which was confirmed by x-ray photoelectron spectroscopy, MEIS, and capacitance–voltage (C–V) analysis. The nanolaminate film represents a promising alternative for gate dielectric applications of future sub-100 nm MOSFET.

Initial nucleation and growth of atomic layer deposited HfO2 gate dielectric layers on Si surfaces with the various surface conditions using in situ medium energy ion scattering analysis

The initial nucleation and growth of atomic layer deposited HfO2 films under various surface conditions were investigated by in situ medium energy ion scattering analysis. The influences of an O–H terminated surface on the initial growth stage were investigated in detail using the atomic density of Hf that reacted on the surface. The measured growth rate of HfO2 per cycle was applied to a mathematical model based on classical chemical kinetics. A parabolic initial growth with an extremely low rate at the initial stage of growth was observed for the film with a hydrogen-terminated surface. However, linear growth, with a value of 1.41×1014Hfatoms∕cm2cycle, was maintained for films grown on an O–H terminated surface. The ∼1∕6 steric hindrance factor extracted from a phenomenological model was related to the size of the tetrahedral HfCl4 molecule and the possible attachment sites. Moreover, the surface roughness and electrical properties of the atomic layer deposited HfO2 films show a strong dependence on the initial nucleation and growth on the different surface conditions.The initial nucleation and growth of atomic layer deposited HfO2 films under various surface conditions were investigated by in situ medium energy ion scattering analysis. The influences of an O–H terminated surface on the initial growth stage were investigated in detail using the atomic density of Hf that reacted on the surface. The measured growth rate of HfO2 per cycle was applied to a mathematical model based on classical chemical kinetics. A parabolic initial growth with an extremely low rate at the initial stage of growth was observed for the film with a hydrogen-terminated surface. However, linear growth, with a value of 1.41×1014Hfatoms∕cm2cycle, was maintained for films grown on an O–H terminated surface. The ∼1∕6 steric hindrance factor extracted from a phenomenological model was related to the size of the tetrahedral HfCl4 molecule and the possible attachment sites. Moreover, the surface roughness and electrical properties of the atomic layer deposited HfO2 films show a strong dependence on the...

Thermal stability and decomposition of the HfO2–Al2O3 laminate system

The thermal stability of the HfO2–Al2O3 laminate gate stack grown by atomic layer chemical vapor deposition was investigated using medium-energy ion scattering spectroscopy and high-resolution x-ray photoelectron spectroscopy. The laminate structure was maintained up to 800 °C under ultrahigh vacuum conditions, while it was drastically degraded at 850 °C, resulting in silicide formation on the film surface. Dissociated oxygen in the Hf–Al-oxide preferentially diffuses out through the film and desorbing at the surface. Volatile SiO species and Al–O components desorb through the sample surface, while HfO2 contributes to Hf silicide formation on the film surface.

Effect of Si lattice strain on the reliability characteristics of ultrathin SiO2 on a 4° tilted wafer

The electrical and structural characteristics of an ultrathin gate dielectric, thermally grown on 4° tilted wafer has been investigated. Compared with a control wafer, a relaxation of the Si lattice strain at the SiO2/Si(001) interface was observed for the 4° tilted wafer, which was confirmed by medium energy ion scattering spectroscopy. A significant improvement in the reliability characteristics of a metal–oxide–semiconductor (MOS) capacitor, with a 2.5-nm-thick gate oxide, grown on a tilt wafer was observed. This improvement in reliability can be explained by the relaxation of strain at the SiO2/Si interface. An ultrathin gate dielectric grown on a tilt wafer represents a promising alternative for gate dielectric applications in future MOS devices.

Self-assembled Ag nanoparticle network passivated by a nano-sized ZnO layer for transparent and flexible film heaters

We investigated a self-assembled Ag nanoparticle network electrode passivated by a nano-sized ZnO layer for use in high-performance transparent and flexible film heaters (TFFHs). The low temperature atomic layer deposition of a nano-sized ZnO layer effectively filled the uncovered area of Ag network and improved the current spreading in the self-assembled Ag network without a change in the sheet resistance and optical transmittance as well as mechanical flexibility. The time-temperature profiles and heat distribution analysis demonstrate that the performance of the TFTH with the ZnO/Ag network is superior to that of a TFFH with Ag nanowire electrodes. In addition, the TFTHs with ZnO/Ag network exhibited better stability than the TFFH with a bare Ag network due to the effective current spreading through the nano-sized ZnO layer.