Jer-Chyi Wang

A physical model for the hysteresis phenomenon of the ultrathin ZrO2 film

This work studies and presents an inner-interface trapping physical model for the ultra-thin (effective oxide thickness=15 A) zirconium oxide (ZrO2) film to explain its hysteresis phenomenon. The shift of the capacitance–voltage characteristics swept from accumulation to inversion and then swept back with light illumination is about 110 mV, which is larger than the shift without light illumination (∼45 mV). The mobile ion effect is obviated using bias-temperature stress measurement. The proposed model successfully explains not only the phenomenon but also the thickness effect for the capacitance–voltage characteristics and the different turn-around voltages of the current density–voltage characteristics of the zirconium dielectrics.

Excellent frequency dispersion of thin gadolinium oxide high-k gate dielectrics

In this letter, we reported a high-k gadolinium oxide (Gd2O3) gate dielectric formed by reactive rf sputtering. It is found that the Gd2O3 gate dielectric film exhibits excellent electrical properties such as low leakage current density, high breakdown voltage, and almost no hysteresis and frequency dispersion in C‐V curves comparable to that of HfO2 film. This indicates that postprocessing treatments can reduce a large amount of interface trap and can passivate a large amount of trapped charge at defect sites.

Highly Reliable Multilevel and 2-bit/cell Operation of Wrapped Select Gate (WSG) SONOS Memory

In this letter, high-performance and reliable wrapped select gate (WSG) polysilicon-oxide-nitride-oxide-silicon (SONOS) memory cells with multilevel and 2-bit/cell operation have been successfully demonstrated. The multilevel storage is easily obtained with fast program/erase speed (10 mus/5 ms) and low programming current (3.5 muA) for our WSG SONOS by a source-side injection. Besides the excellent reliability properties of our multilevel WSG-SONOS memory including unconsidered gate and drain disturbance, long charge retention (>150degC) and good endurance (>104) are also presented. This novel WSG-SONOS memory with a multilevel and 2-bit/cell operation can be used in future high-density and high-performance memory application

Suppression of interfacial reaction for HfO2 on silicon by pre-CF4 plasma treatment

In this letter, the effects of pre-CF4 plasma treatment on Si for sputtered HfO2 gate dielectrics are investigated. The significant fluorine was incorporated at the HfO2∕Si substrate interface for a sample with the CF4 plasma pretreatment. The Hf silicide was suppressed and Hf–F bonding was observed for the CF4 plasma pretreated sample. Compared with the as-deposited sample, the effective oxide thickness was much reduced for the pre-CF4 plasma treated sample due to the elimination of the interfacial layer between HfO2 and Si substrate. These improved characteristics of the HfO2 gate dielectrics can be explained in terms of the fluorine atoms blocking oxygen diffusion through the HfO2 film into the Si substrate.

Characterization of CF4-plasma fluorinated HfO2 gate dielectrics with TaN metal gate

In this paper, fluorine incorporation into the HfO2 gate dielectrics by post CF4 plasma treatment was proposed to improve the electrical characterization. TaN–HfO2–p-Si capacitors were demonstrated in this work. The characteristics of fluorinated HfO2 gate dielectrics were improved, including the capacitance-voltage hysteresis and current-voltage behaviors. This may be attributed to the fluorine incorporated into the HfO2 gate dielectrics as revealed by secondary ion mass spectroscopy. Moreover, the formation of Hf-F bonding was observed through electron spectroscopy for chemical analysis spectra.

Characteristics of Gadolinium Oxide Nanocrystal Memory with Optimized Rapid Thermal Annealing

Gadolinium oxide nanocrystal (Gd 2 O 3 -NC) memories treated by postdeposition rapid thermal annealing were investigated. Bandgap offset performed by a crystallized Gd 2 O 3 -NC dot surrounded by amorphous Gd 2 O 3 dielectrics is successfully demonstrated and proven by the transmission electron microscopy images and electron diffraction pattern. The Gd 2 O 3 -NC memory exhibits a hysteresis memory window of 4 V and NC dot density of more than 8.5 X 10 11 cm -2 . In addition, the formation of Gd 2 O 3 -NC and charge loss characteristics on annealing temperature were analyzed and optimized at 850°C. The data endurance of 10 4 program and erase cycling for a sufficient memory window (>2 V) was also observed for the Gd 2 O 3 nanocrystal memory.

Characterization of temperature dependence for HfO2 gate dielectrics treated in NH3 plasma

For the first time, the characteristics and temperature dependence of electrical properties for ultrathin HfO 2 gate dielectrics treated in NH 3 plasma after deposition were investigated. After this treatment, significantnitrogen incorporation at the HfO 2 /silicon interface (interfacial layer) was examined by Auger electron spectroscopy. Moreover, the formation of Hf-N bonding and the suppression of Hf-Si bonding were observed from electron spectroscopy for chemical analysis spectra. The activation energy of charge trapping reflected in the current-voltage characteristics was effectively reduced, which led to improved hysteresis and its weaker temperature dependence in HfO 2 gate dielectrics treated in NH 3 plasma.

Nanostructure band engineering of gadolinium oxide nanocrystal memory by CF4 plasma treatment

Nanostructure band engineering accomplished by CF4 plasma treatment on Gd2O3 nanocrystal memory was investigated. Under the CF4 plasma treatment, the fluorine was incorporated into the Gd2O3 film and resulted in the modification of energy-band. A physical model was proposed to explain the relationship between the built-in electric field in Gd2O3 nanostructure and the improved program/erase (P/E) efficiency and data retention characteristics. The memory window of the Gd2O3–NC memory with CF4 plasma treatment and postplasma annealing was increased to 3.4 V after 104 P/E cycling. It is demonstrated that the Gd2O3–NC memory with nanostructure band engineering is promising for future nonvolatile memory application.

High-Performance HfO2 Gate Dielectrics Fluorinated by Postdeposition CF4 Plasma Treatment

Downlo High-Performance HfO2 Gate Dielectrics Fluorinated by Postdeposition CF4 Plasma Treatment Woei Cherng Wu, Chao Sung Lai, Jer Chyi Wang, Jian Hao Chen, Ming Wen Ma, and Tien Sheng Chao Department of Electrophysics and Department of Electronic Engineering, National Chiao Tung University, Hsinchu, Taiwan Department of Electronic Engineering, Chang Gung University, Kwei-Shan, Tao-Yuan, Taiwan Nanya Technology Corporation, Kueishan, Taoyuan, Taiwan

CF4 plasma treatment on nanostructure band engineered Gd2O3-nanocrystal nonvolatile memory

The effects of CF4 plasma treatment on Gd2O3 nanocrystal (NC) memory were investigated. For material analysis, secondary ion mass spectrometry and x-ray photoelectron spectroscopy analyses were performed to characterize the fluorine depth profile of the Gd2O3-NC film. In addition, an UV–visible spectrophotometer was used to obtain the Gd2O3 bandgap and analyzed to suggest the modified structure of the energy band. Moreover, the electrical properties, including the memory window, program/erase speed, charge retention, and endurance characteristics were significantly improved depending on the CF4 plasma treatment conditions. This can be explained by the physical model based on the built-in electric field in the Gd2O3 nanostructure. However, it was observed that too much CF4 plasma caused large surface roughness induced by the plasma damage, leading to characteristics degradation. It was concluded that with suitable CF4 plasma treatment, this Gd2O3-NC memory can be applied to future nonvolatile memory applic...