Jerald G. Leach
Texas Instruments
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Featured researches published by Jerald G. Leach.
international symposium on microarchitecture | 1992
Ray Simar; Peter L. Koeppen; Jerald G. Leach; Steve P. Marshall; Dave Francis; Greg Mekras; Jeffrey Rosenstrauch; Scott Anderson
The hardware architecture and software capabilities of the TMS320C40 floating-point digital signal processor are described. The C40 operates at 275 million operations per second (MOPS) and transfers data at a rate of 320 Mbytes/s with a 40-ns cycle time. A key architectural feature of the C40 for parallel computing is the six parallel bidirectional communication ports that permit direct connection and communication between processors in a parallel system. Examples illustrating the use of the C40 in a parallel processing environment are discussed.<<ETX>>
Archive | 1995
Jerald G. Leach
Archive | 1987
Surendar S. Magar; James F. Potts; Jerald G. Leach; L. Ray Simar
Archive | 2002
Jerald G. Leach; Laurence R. Simar; Alan L. Davis; Reid E. Tatge
Archive | 1992
Jerald G. Leach
Archive | 1991
Surendar S. Magar; James F. Potts; Jerald G. Leach; L. Ray Simar
Archive | 1998
David Shippy; Jerald G. Leach
Archive | 1990
Jerald G. Leach; Laurence R. Simar
Archive | 1990
Jerald G. Leach; L. Ray Simar
Archive | 1992
Jerald G. Leach