Ji-Eun Jang

Reference voltage generating circuit for outputting multi-level reference voltage using fuse trimming

Internal voltage initializing circuit for use in semiconductor memory device and driving method thereof

Semiconductor memory device capable of controlling drivability of overdriver

DATA OUTPUT CONTROL CIRCUIT

Semiconductor memory device with zq calibration

Internal voltage generator of semiconductor device

Apparatus for generating power-up signal

Semiconductor memory device having test mode for data access time

On die termination device and semiconductor memory device including the same

Delay locked loop circuit and synchronous memory device including the same