Seok-Cheol Yoon

MEMORY AND MEMORY SYSTEM INCLUDING THE SAME

Delay locked loop in synchronous semiconductor memory device and driving method thereof

Impedance adjusting circuit and semiconductor memory device having the same

Apparatus for supplying internal voltage

Semiconductor memory device having a global data bus

SEMICONDUCTOR MEMORY DEVICE AND ITS DRIVING METHOD

Power-up signal generator of semiconductor device

Internal voltage generating apparatus adaptive to temperature change

Architecture of highly integrated semiconductor memory device

Output enable signal generation circuit for semiconductor memory device