Ji-Sang Yoo

A fast algorithm for designing stack filters

Stack filters are a class of nonlinear filters with excellent properties for signal restoration. Unfortunately, present algorithms for designing stack filters can only be used for small window sizes because of either their computational overhead or their serial nature. This paper presents a new adaptive algorithm for determining a stack filter that minimizes the mean absolute error criterion. The new algorithm retains the iterative nature of many current adaptive stack filtering algorithms, but significantly reduces the number of iterations required to converge to an optimal filter. This algorithm is faster than all currently available stack filter design algorithms, is simple to implement, and is shown in this paper to always converge to an optimal stack filter. Extensive comparisons between this new algorithm and all existing algorithms are provided. The comparisons are based both on the performance of the resulting filters and upon the time and space complexity of the algorithms. They demonstrate that the new algorithm has three advantages: it is faster than all other available algorithms; it can be used on standard workstations (SPARC 5 with 48 MB) to design filters with windows containing 20 or more points; and, its highly parallel structure allows very fast implementations on parallel machines. This new algorithm allows cascades of stack filters to be designed; stack filters with windows containing 72 points have been designed in a matter of minutes under this new approach.

An architecture of a high-speed digital hologram generator based on FPGA

In this paper, a hardware architecture to generate a computer-generated hologram (CGH) in a real-time is proposed and implemented in FPGAs. The algorithm that generates digital hologram is reinterpreted and rearranged for higher operation speed. In order to optimize the hardware architecture and performance, the precision is analyzed using fixed-point simulation. The bit-width inside the hardware is obtained by numerical and visual precision analysis. The structure of the basic calculational unit (CGH Cell), an arrangement of these cells (CGH Kernel) to calculate a row of a hologram, and a processor (CGH Processor) with the kernels to perform the modified CGH algorithm are proposed. The proposed processor was implemented with Xilinx XC2VP70 FPGAs. A 1408x1050 sized hologram for a 3D object consisting of 10,000 light sources can be generated in 0.0093[s] at the operating frequency of 285MHz. Our architecture showed 37.32% and 87.32% higher speed than the best previous work when 1408 cells and 5632 cells are used, respectively.

The problems in digital watermarking into intra-frames of H.264/AVC

This paper intend to show the affect of the intra-prediction on the typical digital watermarking method and the fact that the watermarking method has very low effectiveness when it is performed for the intra-frames of H.264. The target watermarking method was the one for imperceptibility and robustness and was assumed to be performed during the intra-compression process by the H.264 technique. Also this method was assumed to insert watermark data and to extract it for certification if needed. The problem is that the resulting data from the re-engineering of the watermark insertion process to extract the watermark data is different from the one before. We experimentally showed that it stems from the intra-prediction itself. That is, we showed that the resulting image data from only compression without watermarking changes if it is re-compressed by the same conditions as the first compression and it is because the intra-prediction modes as well as the coefficient values change. Also, we applied one blind and one semi-blind watermarking methods to show that the typical attacks after watermarking makes this problem much more serious and lowers the effectiveness of the watermarking method dramatically. Therefore we concluded by considering the experimental data that a typical watermarking method which has been researched so far cannot guarantee the effectiveness of intra-frame watermarking and it is highly required to developed a new kind of methodologies.

Qualitative analysis of individual and composite content factors of stereoscopic 3D video causing visual discomfort

Abstract Recently, much research has been performed to guarantee viewer’s safety in watching stereoscopic 3D videos. Most of them focused on individual content factors causing viewer discomfort. This paper extends the kinds of content factors, and focuses more on the composite, rather than individual, factors. To analyze them, a subjective test for discomfort is performed for four stereoscopic 3D videos. Also, all the quantitative values of the factors to be considered are extracted from the contents. The quantitative factors we consider are the amount of disparity, the frequency and amount of the disparity changes, object movement, and the color and luminance information. In addition, we also include some situational factors, such as story of the contents, situation or circumstances of a scene, and movement, position, and direction of camera. We analyze qualitatively, by comparing the subject test results and the extracted quantitative factors, as well as the situational factors, to find when and how much those factors, in combination or individually, cause viewer discomfort. We summarize, and substantially show which factors, or their combinations, strongly or weakly affect viewer discomfort.

Hardware architecture of high-performance digital hologram generator on the basis of a pixel-by-pixel calculation scheme

In this paper we propose a hardware architecture for high-speed computer-generated hologram generation that significantly reduces the number of memory access times to avoid the bottleneck in the memory access operation. For this, we use three main schemes. The first is pixel-by-pixel calculation, rather than light source-by-source calculation. The second is a parallel calculation scheme extracted by modifying the previous recursive calculation scheme. The last scheme is a fully pipelined calculation scheme and exactly structured timing scheduling, achieved by adjusting the hardware. The proposed hardware is structured to calculate a row of a computer-generated hologram in parallel and each hologram pixel in a row is calculated independently. It consists of and input interface, an initial parameter calculator, hologram pixel calculators, a line buffer, and a memory controller. The implemented hardware to calculate a row of a 1920×1080 computer-generated hologram in parallel uses 168,960 lookup tables, 153,944 registers, and 19,212 digital signal processing blocks in an Altera field programmable gate array environment. It can stably operate at 198 MHz. Because of three schemes, external memory bandwidth is reduced to approximately 1/20,000 of the previous ones at the same calculation speed.

Cell-based hardware architecture for full-parallel generation algorithm of digital holograms

This paper proposes a new hardware architecture to speed-up the digital hologram calculation by parallel computation. To realize it, we modify the computer-generated hologram (CGH) equation and propose a cell-based very large scale integrated circuit architecture. We induce a new equation to calculate the horizontal or vertical hologram pixel values in parallel, after finding the calculation regularity in the horizontal or vertical direction from the basic CGH equation. We also propose the architecture of the computer-generated hologram cell consisting of an initial parameter calculator and update-phase calculators based on the equation, and then implement them in hardware. Modifying the equation could simplify the hardware, and approximating the cosine function could optimize the hardware. In addition, we show the hardware architecture to parallelize the calculation in the horizontal direction by extending computer-generated holograms. In the experiments, we analyze hardware resource usage and the performance-capability characteristics of the look-up table used in the computer-generated hologram cell. These analyses make it possible to select the amount of hardware to the precision of the results. Here, we used the platform from our previous work for the computer-generated hologram kernel and the structure of the processor.

Dual stack filters and the modified difference of estimates approach to edge detection

The theory of optimal stack filtering has been used in the difference of estimates (DoE) approach to the detection of intensity edges in noisy images. The DoE approach is modified by imposing a symmetry condition on the data used to train the two stack filters. Under this condition, the stack filters obtained are duals of each other. Only one filter must therefore be trained; the other is simply its dual. This new technique is called the symmetric difference of estimates (SDoE) approach. The dual stack filters obtained under the SDoE approach are shown to be comparable. This allows the difference of these two filters to be represented by a single equivalent edge operator. This latter result suggests that an edge operator can be found by directly training a (possibly nonpositive) Boolean function to be used on each level of the threshold decomposition architecture. This approach, which is called the threshold Boolean filter (TBF) approach, requires less training time but produces operators that are less robust than those produced by the SDoE approach. This is demonstrated and interpreted via comparisons of results for natural images.

Digital holographic video service system for natural color scene

Abstract. We propose a new system that can generate digital holograms using natural color information. The system consists of a camera system for capturing images (object points) and software (S/W) for various image processing. The camera system uses a vertical rig, which is equipped with two depth and RGB cameras and a cold mirror, which has different reflectances according to wavelength for obtaining images with the same viewpoint. The S/W is composed of the engines for processing the captured images and executing computer-generated hologram for generating digital holograms using general-purpose graphics processing units. Each algorithm was implemented using C/C++ and CUDA languages, and all engines in the form of library were integrated in LabView environment. The proposed system can generate about 10 digital holographic frames per second using about 6 K object points.

QoS Mesh Routing Protocol for IEEE 802.16 based Wireless Mesh Networks

This paper proposes QoS Mesh routing protocol for IEEE 802.16 based wireless mesh networks. QoS Mesh Routing Protocol proposed in this paper is a proactive hop-by-hop QoS routing protocol. The goal of our protocol is not only to find routes from a source to a destination node, but also optimal routes that satisfies QoS requirements, given in terms of bandwidth and delay as default QoS parameters. In this paper, we first analyze possible types of routing protocols that have been studied for MANET and show proactive hop-by-hop routing protocols are the most appropriate for wireless mesh networks. Then, we present a network model for IEEE 802.16 based wireless mesh networks and propose a proactive hop-by-hop QoS routing protocol. Through our simulation, we represent that our routing protocol outperforms QOLSR protocol in terms of end-to-end delay, packet delivery ratio and routing overhead.

A New Coding Technique for Digital Holographic Video Using Multi-View Prediction

In this paper, we proposed an efficient coding method for digital hologram (fringe pattern) acquired with a CCD camera or by computer generation using multi-view prediction and MPEG video compression standard techniques. It processes each R, G, or B color component separately. The basic processing unit is a partial image segmented as the size of M × N. Each partial image retains the information of the whole object. This method generates an assembled image for a column of the segmented and frequency-transformed partial images, which is the basis of the coding process. That is, a motion estimation and compensation technique of MPEG is applied between the reconstructed images from the assembled images with the disparities found during generation of assembled image and the original partial images. Therefore the compressed results are the disparity of each partial image to form the assembled image for the corresponding column, assembled image, and the motion vectors and the compensated image for each partial image. The experimental results with the implemented algorithm showed that the proposed method has NC (Normalized Correlation) values about 4% higher than the previous method at the same compression ratios, which convinced us that ours has better compression efficiency. Consequently, the proposed method is expected to be used effectively in the application areas to transmit or store in digital format the digital hologram data.