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Dive into the research topics where Jianwu Ma is active.

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Featured researches published by Jianwu Ma.


international conference on asic | 2005

Design and verification of CMOS HSTL buffers - YF/spl I.bar/HSTL018

Shaoquan Gao; Jihua Chen; Jianwu Ma; Ting Liu

HSTL level standard is technology for high-speed data transmission. Based on the analysis of applications, a couple of I/O buffers named YF_HSTL018, which are fully complied with HSTL level specification, are designed. The layout of the circuit is also realized. Through the Hspice simulation and chip test, good performance of the I/O buffers is demonstrated


Archive | 2010

Adjustment method of clock fifty percent idle percent based on phase synthesis

Hong Wu; Donglin Wang; Xiaowei He; Weixia Xu; Jianjun Wang; Gan Ouyang; Jihua Chen; Minxuan Zhang; Nuxing Chen; Daheng Le; Jianwu Ma; Shaoqing Li; Liang Chen; Zhenyu Zhao; Shimin Tang


Archive | 2008

Differential circuit delay unit for high-speed voltage control oscillator

Jihua Chen; Shimin Tang; Minxuan Zhang; Shaoqing Li; Zhenyu Zhao; Nuxing Chen; Jianwu Ma; Xiaowei He; Hong Wu; Gan Ouyang; Jianjun Wang; Zheng Liu; Liang Chen; Donglin Wang; Honghai Wang


Archive | 2007

LVDS drive circuit for correcting signal swing rate

Xuejun Yang; Jianjun Wang; Shaoqing Li; Minxuan Zhang; Jihua Chen; Zhenyu Zhao; Nuxing Chen; Jianwu Ma; Xiaowei He; Gan Ouyang; Honghai Wang; Zheng Liu; Shimin Tang; Donglin Wang


Archive | 2007

Full-speed pseudo random sequence generator using half speed clock

Shaoqing Li; Gan Ouyang; Minxuan Zhang; Jihua Chen; Zhenyu Zhao; Nuxing Chen; Jianwu Ma; Weixia Xu; Hong Wu; Xiaowei He; Zheng Liu; Jianjun Wang; Shaoquan Gao; Dongyu Zheng


Archive | 2010

Idle percent adjustable N-time frequency division circuit of pulse synthesis mode

Jihua Chen; Shaoqing Li; Zhenyu Zhao; An Zou Jin; Jianwu Ma; Weixia Xu; Hong Wu; Dongyu Zheng; Zheng Liu; Jianwu Lei; Gan Ouyang; Minxuan Zhang; Jianjun Wang; Nuxing Chen; Xiaowei He


Archive | 2008

Charge pump circuit for eliminating current over pulse in PLL

Nuxing Chen; Xiaowei He; Minxuan Zhang; Shaoqing Li; Jihua Chen; Zhenyu Zhao; Jianwu Ma; Weixia Xu; Hong Wu; Liang Chen; Zheng Liu; Jianjun Wang; Shaoquan Gao; Jianwu Lei; Dongyu Zheng


Archive | 2008

Subword paralleling integer multiplying unit

Minxuan Zhang; Lanfei Dong; Shaoqing Li; Jihua Chen; Zhenyu Zhao; Nuxing Chen; Jianwu Ma; Weixia Xu; Yan Sun; Daheng Le; Peng He; Ting Liu; Renfeng Yu; Xiaowei He; Dongyu Zheng


Archive | 2007

Precise symmetric mutual supplementary signal generation circuit

Xuejun Yang; Jianjun Wang; Shaoqing Li; Minxuan Zhang; Jihua Chen; Zhenyu Zhao; Nuxing Chen; Jianwu Ma; Xiaowei He; Gan Ouyang; Honghai Wang; Zheng Liu; Shimin Tang; Donglin Wang


Archive | 2012

Data reversal bucket shaped shift method based on mask code

Nuxing Chen; Weixia Xu; Yanggan Ou; Jihua Chen; Hong Wu; Zhenyu Zhao; Xiaowei He; Yan Sun; Renfeng Yu; Jianwu Ma; Shaoqing Li; Lanfei Dong; Ting Liu; Peng He; Minxuan Zhang

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Jihua Chen

National University of Defense Technology

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Minxuan Zhang

National University of Defense Technology

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Shaoqing Li

National University of Defense Technology

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Zhenyu Zhao

National University of Defense Technology

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Xiaowei He

National University of Defense Technology

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Jianjun Wang

National University of Defense Technology

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Donglin Wang

National University of Defense Technology

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Dongyu Zheng

National University of Defense Technology

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Shaoquan Gao

National University of Defense Technology

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Ting Liu

National University of Defense Technology

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