Jinbo Wan

Dependable digitally-assisted mixed-signal IPs based on integrated self-test & self-calibration

Heterogeneous SoC devices, including sensors, analogue and mixed-signal front-end circuits and the availability of massive digital processing capability, are being increasingly used in safety-critical applications like in the automotive, medical, and the security arena. Already a significant amount of attention has been paid in literature with respect to the dependability of the digital parts in heterogeneous SoCs. This is in contrast to especially the sensors and front-end mixed-signal electronics; these are however particular sensitive to external influences over time and hence determining their dependability. This paper provides an integrated SoC / IP approach to enhance the dependability. It will give an example of a digitally-assisted mixed-signal front-end IP which is being evaluated under its mission profile of an automotive tyre pressure monitoring system. It will be shown how internal monitoring and digitally-controlled adaptation by using embedded processors can help in terms of improving the dependability of this mixed-signal part under harsh conditions for a long time.

The influence of No Fault Found in analogue CMOS circuits

The most difficult fault category in electronic systems is the “No Fault Found” (NFF). It is considered to be the most costly fault category in, for instance, avionics. The relatively few papers in this area rarely deal with analogue integrated systems. In this paper a simple simulation model has been developed for a particular type of NFF, the intermittent resistive fault resulting from bad interconnections. Simulations have been carried out with respect to a CMOS operational amplifier under influence of NFFs, and the resulting behaviour under different fault conditions has been examined.

Simulating NBTI Degradation in Arbitrary Stressed Analog/ Mixed-Signal Environments

A compact negative bias temperature instability (NBTI) model is presented by iteratively solving the RD equations in a simple way. The new compact model can handle arbitrary stress conditions without solving time-consuming equations, and is hence, suitable for analogue/mixed-signal NBTI simulations in SPICE-like environments. The model has been implemented in Cadence ADE with Verilog-A and also takes the stochastic effect of ageing into account. The simulation speed has increased at least a thousand times compared to classical RD models. The performance of the model has been validated by both RD theoretical solutions and 140-nm CMOS silicon measurement.

Linking aging measurements of health-monitors and specifications for multi-processor SoCs

A new generation of highly dependable multi-processor Systems-on-Chip for safety-critical applications under harsh environments with zero down-time is emerging. In this paper1, the approach towards reaching this ultimate goal is explained. Crucial is this method is linking the measurement data of so-called (on-chip) health monitors during life time with the measurements of degrading key performance parameters of the cores involved. The focus will be here on processor cores, with delay as one of the most critical aging dependent parameters. An extensive (accelerated)-test program was set-up to evaluate the aging of both the health monitors as well as delay of an industrial reconfigurable processor core in harsh environments. The correlation between them will serve as the basis of real-time on-chip health-monitoring based prognostics for life-time prediction, enabling a zero down-time for safety-critical applications.

Boosted gain programmable Opamp with embedded gain monitor for dependable SoCs

SoCs used in safety-critical applications need to be dependable. However in the deep-submicron region, different kinds of aging effects like negative bias temperature instability (NBTI) make the SoCs, especially the analog/mixed-signal parts, undependable. In this paper, a dependability-improved Opamp is designed based on gain programmability and digital gain monitoring. To accomplish an extra gain range for tuning in 65nm technology, a new voltage-gain boosting method is proposed to provide a maximum 92dB gain in a single amplification stage. The NBTI influence is investigated using Cadence RelXpert and dependability properties for the Opamp are provided.

Hierarchical Modeling of Automotive Sensor Front-Ends for Structural Diagnosis of Aging Faults

The semiconductor industry for automotive applications is growing rapidly. This is because advanced electronics is now being developed to monitor and control many vital functions previously handled purely mechanical. In addition hybrid and pure electrical cars are emerging. Parts of these electronic systems have strict safety-critical requirements, while operating in a harsh environment. Although functional diagnosis is currently the norm, many occurring faults during lifetime, e.g. due to aging, cannot be diagnosed. This poses serious threats during operation as correction for dependability is not possible in this case. This suggests the introduction of structural diagnosis techniques. Major problem is that a number of different hierarchies have to be considered and reuse of reliability data at different hierarchies should be possible. This paper investigates a new approach for the development of dependable analogue/mixed-signal car front-ends, by interfacing aging models between different hierarchies enabling structural diagnosis, and explicitly using simultaneously design and simulation data as well as built-in observation measurements at all hierarchies.

An embedded offset and gain instrument for OpAmp IPs

Analog and mixed-signal IPs are increasingly required to use digital fabrication technologies and are deeply embedded into system-on-chips (SoC). These developments append more requirements and challenges on analog testing methodologies. Traditional analog testing methods suffer from less accessibility and control with regard to these embedded analog circuits in SoCs. As an alternative, an embedded instrument for analog OpAmp IP tests is proposed in this paper. It can provide the exact gain and offset values of OpAmps instead of only pass/fail result. Whats more, it is an non-invasive monitor and can work online without isolating the DUT Opamp from its surrounding feedback networks. Nor does it require accurate test stimulations. In addition, the monitor can remove its own offsets without additional complex self-calibration circuits. All self-calibrations are completed in the digital domain after each measurement in real time. Therefore it is also suitable for aging-sensitive applications, in which the monitor may suffer from aging mechanisms and has additional offset drifts as well. The monitor measurement range for offset is from 0.2mV to 70mV, and for gain it is from 0dB to 40dB. The error for offset measurements can be 10% of the measurement value with plus/minus 0.1mV, and -2.5dB for gain measurements.

Designing reliable cyber-physical systems overview associated to the special session at FDL'16

CPS, that consist of a cyber part – a computing system – and a physical part – the system in the physical environment – as well as the respective interfaces between those parts, are omnipresent in our daily lives. The application in the physical environment drives the overall requirements that must be respected when designing the computing system. Here, reliability is a core aspect where some of the most pressing design challenges are: monitoring failures throughout the computing system, determining the impact of failures on the application constraints, and ensuring correctness of the computing system with respect to application-driven requirements rooted in the physical environment. This paper provides an overview of techniques discussed in the special session to tackle these challenges throughout the stack of layers of the computing system while tightly coupling the design methodology to the physical requirements.

An arbitrary stressed NBTI compact model for analog/mixed-signal reliability simulations

A compact NBTI model is presented by directly solving the reaction-diffusion (RD) equations in a simple way. The new model can handle arbitrary stress conditions without solving time-consuming equations and is hence very suitable for analog/mixed-signal NBTI simulations in SPICE-like environments. The model has been implemented in Cadence ADE with Verilog-A and also takes the stochastic effect of aging into account. The simulation speed has increased at least thousands times. The performance of the model is validated by both RD theoretical solutions as well as silicon results.

Monitoring active filters under automotive aging scenarios with embedded instrument

In automotive mixed-signal SoCs, the analogue/mixed-signal front-ends are of particular interest with regard to dependability. Because of the many electrical disturbances at the front-end, often (active) filters are being used. Due to the harsh environments, in some cases, degradation of these filters may be encountered during lifetime and hence false sensor information could be provided with potential fatal results. This paper investigates the influence of aging in three different types of active filters in an automotive environment, and presents an embedded instrument, which monitors this aging behaviour. The monitor can be used for flagging problems in the car console or initiate automatic correction.