Jing-Ping Xu

Electrical Properties of HfTiON Gate-Dielectric GaAs Metal-Oxide-Semiconductor Capacitor With AlON as Interlayer

High- k HfTiON gate-dielectric GaAs MOS capacitors with and without AlON as interfacial passivation layer (IPL) are fabricated and their interfacial and electrical properties are compared. It is found that low interface-state density ( 1.5×1012 cm-2eV-1 at midgap), small gate leakage current ( 1.3×10-4 A/cm2 at Vg=Vfb+1 V), small capacitance equivalent thickness (1.72 nm), large equivalent dielectric constant (25.6), and high device reliability can be achieved for the Al/HfTiON/AlON/GaAs MOS device. All of these should be due to the fact that the AlON IPL on sulfur-passivated GaAs can effectively reduce the density of defective states and unpin the Femi level at the AlON/GaAs interface, thus greatly improving the interfacial and electrical properties of the device.

Performance Improvements of Metal–Oxide–Nitride–Oxide–Silicon Nonvolatile Memory with ZrO2 Charge-Trapping Layer by Using Nitrogen Incorporation

The properties of ZrO2 and ZrON as the charge-trapping layer (CTL) of metal–oxide–nitride–oxide–silicon memory are investigated. The microstructure and chemical bonding are examined by X-ray diffraction and X-ray photoelectron spectroscopy. It is found that nitrogen incorporation in ZrO2 can induce more charge-trapping sites, effectively suppress the formation of zirconium silicate (leading to better interface quality between the CTL and the SiO2 tunneling layer), and increase the dielectric constant of ZrO2, thus improving the memory performances (large memory window, high program/erase speed, good endurance characteristics, and small charge loss).

Improved memory characteristics by NH3-nitrided GdO as charge storage layer for nonvolatile memory applications

Charge-trapping memory capacitor with nitrided gadolinium oxide (GdO) as charge storage layer (CSL) is fabricated, and the influence of post-deposition annealing in NH3 on its memory characteristics is investigated. Transmission electron microscopy, x-ray photoelectron spectroscopy, and x-ray diffraction are used to analyze the cross-section and interface quality, composition, and crystallinity of the stack gate dielectric, respectively. It is found that nitrogen incorporation can improve the memory window and achieve a good trade-off among the memory properties due to NH3-annealing-induced reasonable distribution profile of a large quantity of deep-level bulk traps created in the nitrided GdO film and reduction of shallow traps near the CSL/SiO2 interface.

Improved charge-trapping properties of TiON/HfON dual charge storage layer by tapered band structure

A TiON/HfON dual charge storage layer (CSL) with tapered bandgap structure is proposed for metal-oxide–nitride-oxide–silicon-type memory by using the inter-diffusion of Ti and Hf atoms near the TiON/HfON interface to form an intermixing layer of HfxTiyON with varying Hf/Ti ratio in the dual CSL during post-deposition annealing, as confirmed by transmission electron microscopy. The memory capacitor with TiON/HfON as dual-CSL shows a large memory window of 5.0u2009V at ±12u2009V for 100u2009μs, improved cycling endurance with little degradation after 105 cycles and good data retention with an extrapolated 10-yr window of 4.6u2009V at room temperature. These are highly associated with the tapered bandgap structure and appropriate trap distribution in the dual CSL. Therefore, the TiON/HfON dual-CSL structure provides a very promising solution for future charge-trapping memory applications.

Nitrided SrTiO3 as charge-trapping layer for nonvolatile memory applications

Charge-trapping characteristics of SrTiO3 with and without nitrogen incorporation were investigated based on Al/Al2O3/SrTiO3/SiO2/Si (MONOS) capacitors. A Ti-silicate interlayer at the SrTiO3/SiO2 interface was confirmed by x-ray photoelectron spectroscopy and transmission electron microscopy. Compared with the MONOS capacitor with SrTiO3 as charge-trapping layer (CTL), the one with nitrided SrTiO3 showed a larger memory window (8.4 V at ±10 V sweeping voltage), higher P/E speeds (1.8 V at 1 ms +8u2002V) and better retention properties (charge loss of 38% after 104u2002s), due to the nitrided SrTiO3 film exhibiting higher dielectric constant, higher deep-level traps induced by nitrogen incorporation, and suppressed formation of Ti silicate between the CTL and SiO2 by nitrogen passivation.

Nitrided HfTiON/Ga2O3(Gd2O3) as stacked gate dielectric for GaAs MOS applications

GaAs metal–oxide–semiconductor (MOS) capacitors with HfTiON as a gate dielectric and Ga2O3(Gd2O3) (GGO) as an interlayer annealed in NH3 or N2 are fabricated, and their electrical properties are characterized. Experimental results show that the HfTiON/GGO/GaAs MOS device annealed in NH3 exhibits a low interface-state density (1.1 × 1012 cm−2 eV−1), a small gate leakage current (1.66 × 10−4 A cm−2 at Vg = Vfb + 1 V), a large equivalent dielectric constant (25.7), and a good capacitance–voltage behavior. All these should be attributed to the fact that the GGO interlayer and postdeposition annealing in NH3 can effectively suppress the formation of interfacial Ga/As oxides and remove the excess As atoms at the GaAs surface, thus reducing the relevant defects at/near the GGO/GaAs interface.

Improved charge-trapping properties of HfYON film for nonvolatile memory applications in comparison with HfON and Y2O3 films

The charge-trapping properties of HfYON film are investigated by using the Al/HfYON/SiO2/Si structure. The physical features of this film were explored by transmission electron microscopy and x-ray photoelectron spectroscopy. The proposed device shows better charge-trapping characteristics than samples with HfON or Y2O3 as the charge-trapping layer due to its higher trapping efficiency, as confirmed by extracting their charge-trap centroid and charge-trap density. Moreover, the Al/Al2O3/HfYON/SiO2/Si structure shows high program speed (4.5 V at +14 V, 1 ms), large memory window (6.0 V at ±14 V, 1 s), and good retention property, further demonstrating that HfYON is a promising candidate as the charge-trapping layer for nonvolatile memory applications.

Improved Interfacial and Electrical Properties of Ge-Based Metal-Oxide-Semiconductor Capacitor With LaTaON Passivation Layer

The interfacial and electrical properties of Ge-based metal-oxide-semiconductor (MOS) capacitor with high-k gate dielectric of HfTiO and passivation interlayer of LaTaON are investigated. Experimental results show the Ge MOS with HfTiO/LaTaON gate-stacked dielectric exhibits low interface-state density (7.8 × 10¹¹ cm^-2 eV^-1), small gate-leakage current (7.88 × 10^-4 A cm^-2 at V_g - V_fb = 1 V), small capacitance equivalent thickness (1.1 nm), and large equivalent dielectric constant (27.7). X-ray photoelectron spectroscopy and transmission electron microscopy reveal that the improvements should be due to the fact that La/Ta-based oxide/oxynitride has excellent interface properties with Ge, and the LaTaON interlayer can effectively block the in-diffusion of oxygen and the out-diffusion of germanium, thus suppressing the growth of low-k GeO_x and intermixing between Ge and Hf.

Using Ge-Doped La-Oxynitride as Interfacial Passivation Layer for GaAs Metal-Oxide-Semiconductor Capacitors

The GaAs MOS capacitors using ZrON as high-k gate dielectric with LaGeON or LaON as an interfacial passivation layer (IPL) are fabricated and their electrical and interfacial properties are investigated. Compared to their counterpart without IPL, introducing LaGeON or LaON as IPL results in a large improvement of interface quality and electrical properties of the GaAs MOS devices, for example, improved capacitance-voltage behavior, reduced interface-state density and gate leakage current, and enhanced device reliability. Moreover, because of Ge incorporation, the LaGeON IPL becomes more stable and can more efficiently block the Ga/As out-diffusion and O in-diffusion to reduce the defect-related Ga/As-O and As-As bonds at the GaAs surface, thus exhibiting the best interface quality and electrical properties, and high device reliability.

Plasma-Nitrided Ga 2 O 3 (Gd 2 O 3 ) as Interfacial Passivation Layer for InGaAs Metal–Oxide– Semiconductor Capacitor With HfTiON Gate Dielectric

Plasma nitridation is used for nitrogen incorporation in Ga₂O₃(Gd₂O₃) (GGO) as interfacial passivation layer for an InGaAs metal-oxide-semiconductor capacitor with a HfTiON gate dielectric. The nitrided GGO (GGON) on InGaAs can improve the interface quality with a low interface-state density at midgap (1.0 × 10¹² cm^-2 eV^-1), and result in good electrical properties for the device, e.g., low gate leakage current (8.5 × 10^-6 A/cm² at V_g = 1 V), small capacitance equivalent thickness (1.60 nm), and large equivalent dielectric constant (24.9). The mechanisms involved lie in the fact that the GGON interlayer can effectively suppress the formation of the interfacial In/Ga/As oxides and remove excess As atoms on the InGaAs surface, thus unpinning the Femi level at the GGON/InGaAs interface and improving the interface quality and electrical properties of the device.