Jiunn-Ren Hwang

Self-aligned conductive spacer process for sidewall control gate of high-speed random access memory

Structure and method for a sidewall SONOS memory device

Memory array with a selector connected to multiple resistive cells

NON-VOLATILE MEMORY DEVICE WITH POLYSILICON SPACER AND METHOD OF FORMING THE SAME

Sidewall SONOS gate structure with dual-thickness oxide and method of fabricating the same

Structure and method for a sidewall SONOS non-volatile memory device

Integrated circuit device and memory array

Manufacturing of memory array and periphery

Non-volatile floating gate memory cells with polysilicon storage dots and fabrication methods thereof

Method of fabricating a SONOS gate structure with dual-thickness oxide