Jocelyn Sérot
Blaise Pascal University
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Publication
Featured researches published by Jocelyn Sérot.
IEEE Transactions on Ultrasonics Ferroelectrics and Frequency Control | 2004
Álvaro Hernández; Jesús Ureña; J.J. Garcia; Manuel Mazo; Daniel Hernanz; Jean-Pierre Derutin; Jocelyn Sérot
In recent applications based on ultrasound, several ultrasonic transducers have been geometrically and electronically associated to constitute a global sensor. There are several different methods used to process the ultrasonic signals obtained from these transducers. In this work, multimode techniques using Golay complementary sequences are proposed for processing the ultrasonic signal. The system increases scan rate, precision, and reliability. It is also capable of echo discrimination, allowing simultaneous measurements to be made and detection of the same obstacle by different transducers without cross-talk problems. The real-time implementation of the algorithm is presented on a field-programmable gate array (FPGA) device.
parallel computing | 2006
Joel Falcou; Jocelyn Sérot; Thierry Chateau; Jean-Thierry Lapresté
We present QUAFF, a new skeleton-based parallel programming library. Its main originality is to rely on C++ template meta-programming techniques to achieve high efficiency. In particular, by performing most of skeleton instantiation and optimization at compile-time, QUAFF can keep the overhead traditionally associated to object-oriented implementations of skeleton-based parallel programming libraries very small. This is not done at the expense of expressivity. This is demonstrated in this paper by several applications, including a full-fledged, realistic real-time vision application.
parallel computing | 2002
Jocelyn Sérot; Dominique Ginhac
This paper is a general overview of the SKIPPER project, run at Blaise Pascal University between 1996 and 2002. The main goal of the SKIPPER project was to demonstrate the applicability of skeleton-based parallel programming techniques to the fast prototyping of reactive vision applications. This proiect has produced several versions of a full-fledged integrated parallel programming environment (PPE). These PPEs have been used to implement realistic vision applications, such as road following or vehicle tracking for assisted driving, on embedded parallel platforms embarked on semi-autonomous vehicles. All versions of SKIPPER share a common front-end and repertoire of skeletons--presented in previous papers--but differ in the techniques used for implementing skeletons. This paper focuses on these implementation issues, by making a comparative survey, according to a set of four criteria (efficiency, expressivity, portability, predictability), of these implementation techniques. It also gives an account of the lessons we have learned, both when dealing with these implementation issues and when using the resulting tools for prototyping vision applications.
international conference on distributed smart cameras | 2007
Fabio Dias; François Berry; Jocelyn Sérot; François Marmoiton
Processing images to extract useful information in real-time is a complex task, dealing with large amounts of iconic data and requiring intensive computation. Smart cameras use embedded processing to save the host system from the low-level processing load and to reduce communication flows and overheads. Field programmable devices present special interest for smart cameras design: flexibility, reconfigurability and parallel processing skills are some specially important features. In this paper we present a FPGA-based smart camera research platform. The hardware architecture is described, and some design issues are discussed. Our goal is to use the possibility to reconfigure the FPGA device in order to adapt the system architecture to a given application. To that, a design methodology, based on pre-programmed processing elements, is proposed and sketched. Some implementation issues are discussed and a template tracking application is given as example, with its experimental results.
parallel computing technologies | 1999
Jocelyn Sérot; Dominique Ginhac; Jean-Pierre Derutin
This paper presents SKiPPER, a programming environment dedicated to the fast prototyping of parallel vision algorithms on MIMD-DM platforms. SKiPPER is based upon the concept of algorithmic skeletons, i.e. higher order program constructs encapsulating recurring forms of parallel computations and hiding their low-level implementation details. Each skeleton is given an architecture-independent functional (but executable) specification and a portable implementation as a generic process template. The source program is a purely functional specification of the algorithm in which all parallelism is made explicit by means of composing instances of selected skeletons, each instance taking as parameters the application specific sequential functions written in C. SKiPPER compiles this specification down to a process graph in which nodes correspond to sequential functions and/or skeleton control processes and edges to communications. This graph is then mapped onto the target topology using a third-party CAD software (SynDEx). The result is a dead-lock free, optimized (but still portable) distributed executive, which SKiPPER finally turns into executable code for the target platform. The initial specification, written in ML language, can also be executed on any sequential platform to check the correctness of the parallel algorithm. The applicability of SKiPPER concepts and tools has been demonstrated by parallelising several realistic real-time vision applications both on a multi-DSP platform and a network of workstations. It is here illustrated with a real-time vehicle detection and tracking application.
Microprocessors and Microsystems | 2003
Álvaro Hernández; Jesús Ureña; Daniel Hernanz; J.J. Garcia; Manuel Mazo; Jean-Pierre Derutin; Jocelyn Sérot; Sira E. Palazuelos
Abstract Multi-mode techniques reduce scanning times in ultrasonic systems, as they allow transducers in a sensor to simultaneously emit and receive without interference. In order to implement these techniques, it is necessary to encode each transducers emission. The use of orthogonal pairs of Golay sequences associated with different emitters avoids crosstalk among them. However, these sequences imply an increase in the computational complexity required in the receiver. This paper presents the practical implementation of a system, with two emitters and four receivers, using a low-cost hardware architecture based on a FPGA. The ultrasonic signal processing is performed in real time.
machine vision applications | 2001
Jocelyn Sérot; Dominique Ginhac; Roland Chapuis; Jean-Pierre Derutin
Abstract. We present a design methodology for real-time vision applications aiming at significantly reducing the design-implement-validate cycle time on dedicated parallel platforms. This methodology is based upon the concept of algorithmic skeletons, i.e., higher order program constructs encapsulating recurring forms of parallel computations and hiding their low-level implementation details. Parallel programs are built by simply selecting and composing instances of skeletons chosen in a predefined basis. A complete parallel programming environment was built to support the presented methodology. It comprises a library of vision-specific skeletons and a chain of tools capable of turning an architecture-independent skeletal specification of an application into an optimized, deadlock-free distributive executive for a wide range of parallel platforms. This skeleton basis was defined after a careful analysis of a large corpus of existing parallel vision applications. The source program is a purely functional specification of the algorithm in which the structure of a parallel application is expressed only as combination of a limited number of skeletons. This specification is compiled down to a parametric process graph, which is subsequently mapped onto the actual physical topology using a third-party CAD software. It can also be executed on any sequential platform to check the correctness of the parallel algorithm. The applicability of the proposed methodology and associated tools has been demonstrated by parallelizing several realistic real-time vision applications both on a multi-processor platform and a network of workstations. It is here illustrated with a complete road-tracking algorithm based upon white-line detection. This experiment showed a dramatic reduction in development times (hence the term fast prototyping), while keeping performances on par with those obtained with the handcrafted parallel version.
european conference on parallel processing | 1997
Jocelyn Sérot
This paper aims at presenting an experimental but practical implementation of a skeleton-based parallel programming methodology based upon the integration of the MPI message-passing interface and a state-of-the-art ML compiler. The combination of a small number of higher-level communication abstractions and a SPMD style of programming has proven to provide a safe and fast way of designing parallel programs without loosing efficiency. The usefulness of the approach has been demonstrated by parallelising a complete image processing application.
field-programmable logic and applications | 2011
Jocelyn Sérot; François Berry; Sameer Ahmed
We introduce CAPH, a new domain-specific language (DSL) suited to the implementation of stream-processing applications on field programmable gate arrays (FPGA). \caph relies upon the actor/dataflow model of computation. Applications are described as networks of purely dataflow actors exchanging tokens through unidirectional channels. The behavior of each actor is defined as a set of transition rules using pattern matching. The \caph suite of tools currently comprises a reference interpreter and a compiler producing both SystemC and synthetizable VHDL code. We describe the implementation with a preliminary version of the compiler, of a simple real-time motion detection application on a FPGA-based smart camera platform. The language reference manual and a prototype compiler are available from http://wwwlasmea.univ-bpclermont.fr/Personnel/Jocelyn.Serot/caph.html.
Archive | 2013
Jocelyn Sérot; François Berry; Sameer Ahmed
We introduce CAPH, a new domain-specific language (DSL) suited to the implementation of stream-processing applications on field programmable gate arrays (FPGA). CAPH relies upon the actor/dataflow model of computation. Applications are described as networks of purely dataflow actors exchanging tokens through unidirectional channels. The behavior of each actor is defined as a set of transition rules using pattern matching. The CAPH suite of tools currently comprises a reference interpreter and a compiler producing both SystemC and synthetizable VHDL code. We describe the implementation, with a preliminary version of the compiler, of a simple real-time motion detection application on an FPGA-based smart camera platform. The language reference manual and a prototype compiler are available from http://wwwlasmea.univ-bpclermont.fr/Personnel/Jocelyn.Serot/caph.html.