Johan De Baets

Surface Modification of a Photo-Definable Epoxy Resin with Polydopamine to Improve Adhesion with Electroless Deposited Copper

Abstract This paper describes the influence of polydopamine surface modifications on the adhesion strength of electroless deposited copper on roughened epoxy resin substrates. The surfaces are characterized with XPS and ToF-S-SIMS. Next, a thorough investigation of the copper–epoxy interface is performed using SEM. Both the polydopamine modification and the variation of the electroless plating bath temperature lead to new insights into the different contributions of chemical and physical adhesion to the overall adhesion strength.

Processing quality results for electroless/electroplating of high-aspect ratio plated through holes in industrially produced printed circuit boards

Abstract The plating quality results of high-aspect ratio through holes in industrially produced and sized printed circuit boards are reported in this paper. Test panels with 32,000 PTHs were processed on an existing industrial production line in order to test the possibilities of modifying the line for panels with higher aspect-ratio plated through holes. Depending on the process parameters different types of faults in the plating of these plated through holes were detected, varying from gas bubbles stuck inside the plated through hole, rough and non-plated glass fibers caused by the drilling of the holes, to parts of resist stuck inside the through holes. The type of error occurring is dependent on the processing used. Because each individual processing step can influence the following processing steps, an integrated quality approach has to be considered. Most of these problems could be solved by small changes in process parameters. Making a quantitative analysis of the type of errors resulted in a drastic reduction in the number of unplated through holes on industrial panels. This was done by identifying and classifying the type of error occurring. Aspect ratio’s of 10.7 could be plated with a high yield on an existing vertical electroless plating line.

Stretchable Circuits with Horseshoe Shaped Conductors Embedded in Elastic Polymers

Conformable electronics, i.e., electronics that can be applied on curved surfaces, is demanded nowadays in place of conventional rigid printed circuit board (PCB) based electronics for a number of applications. In the field of stretchable electronics there has been a swift progress in recent years. In this paper we are presenting our contribution to this ever growing topic, including thin-film based polyimide (PI), supported Au stretchable meanders as well as PCB based Cu meanders. These meanders are supported by PI or poly(ethylene naphthalate)/poly(ethylene terephthalate) (PEN/PET) films. Thin-film based stretchable interconnects is targeting mainly the biocompatible environments with demands for strong miniaturization while the PCB based technology is used more for large area applications. Both approaches are reviewed in this paper in terms of fabrication processes, materials and cyclic fatigue reliability. For each technology fabricated demonstrators are presented as well.

New model for the characterization and simulation of TFTs in all operating regions

Abstract— A new, semi-empirical model that describes TFTs in all operating regions with only one dynamic and five static parameters is proposed. This model can easily be implemented in most simulation programs and used to predict TFT circuit behavior. The five static parameters can automatically be extracted from current measurements and form a very compact yet adequate representation of the TFT characteristics. This proves especially useful when storing and statistically processing measurement results for a large number of devices, such as the pixel TFTs in an active matrix.

A comparative study of via drilling and scribing on PEN and PET substrates for flexible electronic applications using excimer and Nd:YAG laser sources

A study on via drilling and channel scribing on PEN and PET substrates for flexible electronic application is discussed in this paper. For the experiments, both KrF excimer laser (248 nm) and frequency tripled Nd:YAG (355 nm) laser are used. Different measurement techniques like optical microscopy, Dektak profilometer, Confocal microscopy and scanning electron microscopy (SEM) were employed to characterize the quality of the channels and vias. The patterned structures were filled by three different methods using a conductive paste or ink that is cured in an oven at an elevated temperature. The cross-sectional measurements of channels and vias were carried out using SEM to study the uniformity of filling.

Excimer laser microvia-technology in multichip modules

Abstract Microelectronics is moving towards smaller and lighter devices with high I/O counts. This involves the development of small via generation processes. Laser ablation technology is available and also compatible with conventional PCB technology. It allows to bring more functionality in the PCB or to utilize components like chip scale packages (CSP) or as flip chip in order to obtain multichip module laminates (MCM-Ls). In the current work, we use a UV laser in order to generate high-density arrays of microvias (well

A chip embedding solution based on low-cost plastic materials as enabling technology for smart labels

Expanding the current smart packaging solutions to individual products requires improvement for several of the following properties: cost, thickness, weight, flexibility, conformability, transparency, and even stretchability. This paper focusses on an embedding technology that targets the first four properties, with an emphasis on cost reduction. The progress on the development work for this foil-based embedding is reported, along with a detailed failure analysis of the process flow. A functional demonstrator is realized in the form of a smart sensing label, including an embedded micro controller. Practical and technological shortcomings of the current technology are used as a starting point for proposing an improved embedding technology based on low-cost plastic materials. The first developments for lamination and via interconnection are described.

System-in-Foil Technology

Systems-in-foil are an emerging new class of flexible electronic products in which complete systems are integrated in thin polymeric foils. First, a brief overview of the basic material choices and fabrication concepts will be given. Then, more detailed attention will be paid to the approaches of heterogeneous integration of thin chips. The different integration process flows and challenges and application fields will be described for three distinct areas: (1) ultra-thin chip packages with high density interconnects; (2) embedded circuitries for low cost flip-chip attachment to flexible substrates; and (3) embedded optical chips. It is important also to balance secondary material properties like thermal expansion, elastic moduli and adhesion strengths of different materials used to facilitate reliable operation of systems-in-foil under mechanical bending and at varied temperatures.

Flexible and stretchable electronics for wearable healthcare

Measuring the quality of human health and well-being is one of the key growth areas in our society. Preferably, these measurements are done as unobtrusive as possible. These sensoric devices are then to be integrated directly on the human body as a patch or integrated into garments. This requires the devices to be very thin, flexible and sometimes even stretchable. An overview will be given of recent technology developments in this domain and concrete application examples will be shown.

High-frequency characterization of embedded active components in printed circuit boards

A number of three dimensional packaging solutions have emerged in recent years. Embedding active components in the build-up layers of a printed circuit board is a cost-effective technology, providing a high degree of integration for future packaging requirements. Since this technology offers clear advantages for high-speed applications, a high-frequency characterization is essential. This paper studies the influence of embedded chips on high-speed interconnects running on top. A similar geometry found in integrated circuits is used as a start for the research. Investigation of this metal-insulator-semiconductor transmission line reveals three propagating modes, depending on frequency and silicon conductivity: a dielectric mode, the skin-effect mode and the slow-wave mode. A mode analysis of the parallel-plate approximation is used to formulate detailed expressions describing the frequency dependent behavior of the real and imaginary part of the effective dielectric constant. 3D electromagnetic simulations confirm that this model gives a good description of the behavior of embedded dies, but needs some adjustments to accurately predict the results. The parameters extracted from the measurement show a good correspondence to the model as far as the real part of the dielectric constant is concerned. Due to the limitations of the available test structures, an accurate quantitative analysis of the losses is not possible; however the overall behavior matches with the model. The specific geometry of substrates with embedded components requires adaptations to the formulae predicted by the parallel-plate approach. Especially the presence of a die bonding adhesive layer and the high track thickness needs to be taken into account. This paper shows that the MIS model can act as a good starting point for an in depth characterization of microstrips running on top of embedded components.