Johan Raman

A Closed-Loop Digitally Controlled MEMS Gyroscope With Unconstrained Sigma-Delta Force-Feedback

In this paper, we describe the system architecture and prototype measurements of a MEMS gyroscope system with a resolution of 0.025deg/s/ radic(Hz). The architecture makes extensive use of control loops, which are mostly in the digital domain. For the primary mode both the amplitude and the resonance frequency are tracked and controlled. The secondary mode readout is based on unconstrained SigmaDelta force-feedback, which does not require a compensation filter in the loop and thus allows more beneficial quantization noise shaping than prior designs of the same order. Due to the force-feedback, the gyroscope has ample dynamic range to correct the quadrature error in the digital domain. The largely digital setup also gives a lot of flexibility in characterization and testing, where system identification techniques have been used to characterize the sensors. This way, a parasitic direct electrical coupling between actuation and readout of the mass-spring systems was estimated and corrected in the digital domain. Special care is also given to the capacitive readout circuit, which operates in continuous time.

An approach to tackle quantization noise folding in double-sampling /spl Sigma//spl Delta/ modulation A/D converters

/spl Sigma//spl Delta/-modulation is a proven method to realize high- and very high-resolution analog-to-digital converters. A particularly efficient way to implement such a modulator uses double-sampling where the circuit operates during both clock phases of the master-clock. Hence, the sampling frequency is twice the master-clock frequency. Unfortunately, path mismatch between both sampling branches causes a part of the quantization noise to fold from the Nyquist frequency back in the signal band. Therefore, the performance is severely degraded. In this paper, we show that the problem is reduced but not eliminated by employing multibit quantization. Next, we present an in-depth solution for the problem. The approach consists of modifying the quantization noise transfer function of the overall modulator to have one or several zeros at the Nyquist frequency. This way the effect of noise folding can nearly be eliminated. It is shown that this can be implemented by a simple modification of one of the integrators of the overall modulator circuit. Finally, several design examples of single-bit and multibit modulators are discussed.

An Unconstrained Architecture for Systematic Design of Higher Order

Nowadays, SigmaDelta-modulation is a widely used technique for analog-to-digital (A/D) conversion, especially when aiming for high resolutions. While being applied initially for purely electrical A/D converters, its application has been expanded to mixed mechanical-electrical systems. This has led to the use of SigmaDelta force-feedback for digital readout of high-performance inertial sensors. However, compared with their electrical counterpoint, SigmaDelta force-feedback loops often have to deal with three additional issues: 1) an increased stability problem due to phase-lag occurring in the sensor; 2) the injection of relatively high levels of readout noise in the loop; and 3) the lack of degrees-of-freedom of many SigmaDelta force-feedback architectures for implementing an arbitrary noise transfer function. As a result, SigmaDelta force-feedback loops found in literature are designed in a much less systematic way as compared with electrical SigmaDelta modulators. In this paper, we address these issues and propose a new unconstrained architecture. Based on this architecture, we are able to present a systematic approach for designing SigmaDelta force-feedback loops. Additionally, the main strengths and weaknesses of different SigmaDelta force-feedback architectures are discussed.

\Sigma\Delta

In this paper we describe the system architecture and prototype measurements of a MEMS gyroscope with a resolution of 0.055°/s/√Hz. Two innovations are presented. The first is the complete migration of control and demodulation tasks to the digital domain. For this purpose, interfacing circuits based on ΣΔ techniques are introduced for both primary and secondary mode. The advantage is that complex analog electronics for tracking the resonant frequency, stabilizing the amplitude of the primary mode oscillation and phase-sensitive demodulation can be replaced by their digital counterpart. A second innovation relates to the ΣΔ force-feedback loop. In previously reported structures a compensation filter is introduced for stabilizing the loop [ 1– 3]. Unfortunately, the compensation filter introduces extra poles and influences the noise-shaping characteristic, which makes the loop difficult to design and optimize. We demonstrate the possibility of obtaining a stable ΣΔ force-feedback loop without an explicit compensation filter.

Force-Feedback Loops

A method to eliminate the effect of capacitor mismatch for a switched-capacitor DAC is described. The method consists of two elements. The first element is the use of a compensating switching algorithm, which can eliminate the effect of capacitor mismatch only for some digital input values. The second element is that each digital word is written as the sum of two other words for which the capacitor mismatch can be eliminated. These words are converted and the corresponding voltages are summed.

A Digitally Controlled MEMS Gyroscope With Unconstrained Sigma-Delta Force-Feedback Architecture

In this paper a novel online calibration technique for high-speed DACs is presented. The approach consists of two elements. The first element is the use of a redundant signed digit (RSD) scheme for the selection of the current sources. This enables a fully digital correction. The second element consists of an adaptive estimation of the correction terms by an LMS algorithm. For this purpose the DAC output signal is low-pass filtered and digitized by an accurate but low-speed calibration ADC. By replicating this analog signal path in the digital domain, the errors can be calculated and used to update the correction weights. The dynamic behavior and the accuracy of the adaptive calibration loop are analyzed both theoretically and through computer simulations, and it is shown that this way a greatly improved accuracy can be obtained.

Capacitor mismatch compensation for the quasi-passive-switched-capacitor DAC

We present a very compact analog-to-digital convertor (ADC) for use as a standard cell. To achieve an inherent accuracy of at least 12-bits without trimming or calibration, extended counting A/D-conversion is used. Here, the circuit performs a conversion by passing through two modes of operation: first it works as a 1st-order incremental convertor and then it is reconfigured to operate as a conventional algorithmic converter. This way, we obtain a Nyquist-rate converter that requires only 1 operational amplifier and achieves 12-bit accuracy performance in 13 clock cycles with 9 bit capacitor matching. The circuit is designed in 0.18 μm CMOS with a thick oxide option. The resulting analog core occupies a chip area of only 0.011 mm2 and the complete digital control and reconstruction logic (including additional test features and storage registers) is 0.02 mm2. The analog blocks of the circuit consume 1.2mW and the digital 0.4mW. At a sample rate of 1 MS/s, the peak SNDR is 74.5dB and the dynamic range is 78dB, constant over the Nyquist band. The worst-case integral non-lineairity (INL) is within ±0.55 LSB.

An On-Line Calibration Technique for Mismatch Errors in High-Speed DACs

/spl Sigma//spl Delta/-modulation is a proven method to realize high-resolution A/D converters. A particularly efficient way to implement such a modulator uses double-sampling where the sampling frequency is twice the master-clock frequency. Unfortunately path mismatch between both sampling branches causes a part of the quantisation noise to fold from the Nyquist frequency back in the signal band. This degrades the performance. In this paper we show that multi-bit quantisation provides a partial solution for this problem. Next we present a true solution. The approach consists of modifying the quantisation noise transfer function of the modulator to have one or several zeros at the Nyquist frequency. This way the effect of noise folding can nearly be eliminated. It is shown that this can be implemented by a simple modification of one of the integrators of the overall modulator circuit. Finally several design examples of single-bit and multi-bit modulators are discussed.

A very compact 1MS/s Nyquist-rate A/D-converter with 12 effective bits

A mechanical two-mass configuration and a readout circuit for a single-axis capacitive-readout accelerometer with ΣΔ force-feedback is presented. The system reduces electrical and quantisation input-referred noise through the use of negative springs, reduced gaps in the readout capacitors and maximised readout voltage. A theoretical analysis and simulation results are discussed.

An efficient technique to eliminate quantisation noise folding in double-sampling /spl Sigma//spl Delta/ modulators

In this correspondence, a new adaptive delay estimator using only two LMS filters is presented. Compared with other algorithms, a significant reduction in computational complexity is obtained because only time domain processing is required. In addition, a new frequency-domain adaptive delay estimator has been introduced, and the link between both methods is clarified. Comparison with algorithms described in literature turns out favorably.