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Dive into the research topics where John C. Rodgers is active.

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Featured researches published by John C. Rodgers.


IEEE Transactions on Nuclear Science | 2003

Chalcogenide memory arrays: characterization and radiation effects

Jonathan Maimon; Kenneth K. Hunt; Laura Burcin; John C. Rodgers

The chalcogenide material used for phase-change applications in rewritable optical storage (Ge/sub 2/Sb/sub 2/Te/sub 5/) has been integrated with a 0.5-/spl mu/m radiation-hardened CMOS process to produce 64-Kbit memory arrays. On selected arrays, electrical testing demonstrated up to 100% memory cell yield, 100-ns programming and read speeds, and write currents as low as 1 mA/bit. Devices functioned normally from -55/spl deg/C to 125/spl deg/C. Write/read endurance has been demonstrated to 1/spl times/10/sup 8/ before first bit failure. Total ionizing dose (TID) testing to 2 Mrad(Si) showed no degradation of chalcogenide memory element, but it identified a write current generator circuit degradation specific to the test chip, which can be easily corrected in the next generation of array and product. Static single-event effects (SEE) testing showed no effect to an effective linear energy transfer (LET/sub EFF/) of 98 MeV/mg/cm/sup 2/. Dynamic SEE testing showed no latchup or single-event gate rupture (SEGR) to an LET/sub EFF/ of 123 MeV/mg/cm/sup 2/. Two sensitive circuits, neither containing chalcogenide elements, and both with small error cross sections, were identified. The sense amp appears sensitive to transients when reading the high-resistance state. The write driver circuit may be falsely activated during a read cycle, resulting in a reprogrammed bit. Radiation results show no degradation to the hardened CMOS or effects that can be attributed to the phase-change material.


IEEE Transactions on Nuclear Science | 2011

Incremental Enhancement of SEU Hardened 90 nm CMOS Memory Cell

Nadim F. Haddad; Andrew T. Kelly; Reed K. Lawrence; Bin Li; John C. Rodgers; Jason F. Ross; Kevin M. Warren; Robert A. Weller; Marcus H. Mendenhall; Robert A. Reed

SEU enhancements were introduced into a radiation hardened 90 nm CMOS technology to achieve upset immunity. An incremental enhancement approach that enables various SEU/performance trade-off was demonstrated on the same basic SRAM cell to achieve various degrees of hardness, by the selective utilization of enhancement features. Single event upset testing, as well as MRED simulation, have demonstrated a significant enhancements achieved with a minimal performance penalty.


non volatile memory technology symposium | 2008

A 4-Mb Non-volatile Chalcogenide Random Access Memory designed for space applications: Project status update

John C. Rodgers; Jonathan Maimon; Thomas M. Storey; David Lee; Michael Graziano; Leonard Rockett; Kenneth K. Hunt

BAE Systems, under contract to the US Air Force Research Labs, has been developing a 4Mb Non-Volatile Chalcogenide Random Access Memory (C-RAM¿) optimized for the radiation environments encountered in spacecraft applications. C-RAM is a phase change memory with a unique combination of features that collectively provide a high-density, low-power, non-volatile memory solution that is radiation hardened and meets rigorous reliability requirements. The device is now undergoing QML qualification in preparation for being flight production ready in early 2009. Flight qualified C- RAM will serve the critical need for rad hard non-volatile RAM in strategic space and military applications. Initial space radiation effects testing (heavy ion induced upset rates) demonstrate the robust nature of the device. No memory cell upsets were recorded and the majority of the observed upsets were soft errors (SE) induced in the sense amp circuits which are easily correctable with common error correcting code (ECC) algorithms. During the product development phase potential failure mechanisms associated with phase change memories such as proximity disturbs and drill-in effects were evaluated to determine whether they were legitimate concerns for C-RAM. These tests and other tests involving second order radiation effects, such as the effect of heavy ion radiation exposure on data retention lifetime were conducted. The results of these investigations further demonstrate the full capacity of the product technology. This paper will describe the C-RAM design and operation, and the results of the test and characterization of C-RAM devices.


ieee aerospace conference | 2004

Results of radiation effects on a chalcogenide non-volatile memory array

Jonathan Maimon; Kenneth K. Hunt; John C. Rodgers; Laura Burcin; K. Knowles

We report on the progress of a recent addition to non-volatile solid state memory technologies suited for space and other ionizing radiation environments. We summarize the material and processing science behind the current generation of chalcogenide phase-change memories fabricated on CMOS structures. The chalcogenide material used for phase-change applications in rewritable optical storage (Ge/sub 2/Sb/sub 2/Te/sub 5/) has been integrated with a radiation hardened CMOS process to produce 64 kbit memory arrays. On selected arrays electrical testing demonstrated up to 100% memory cell yield, 100 ns programming and read speeds, and write currents as low as 1 mA/bit. Devices functioned normally from -55/spl deg/C to 125/spl deg/C. Write/read endurance has been demonstrated to 1/spl times/10/sup 8/ before first bit failure. Radiation results show no degradation to the hardened CMOS or effects that can be attributed to the phase-change material. Future applications of the technology are discussed.


non-volatile memory technology symposium | 2005

Characterization of the 4Mb chalcogenide-random access memory

Tom Storey; Kenneth K. Hunt; Michael Graziano; Bin Li; Adam Bumgarner; John C. Rodgers; Laura Burcin

The first generation of C-RAM memory is designed to greatly exceed (in density, write speed, endurance) the existing non-volatile memory solutions for space and to close the gap that exists between system requirements and availability. Based on the success of the 64kb C-RAM program, a 4Mb C-RAM prototype has been designed and fabricated in 0.25 mum radiation-hardened CMOS. In this paper we present a description of the 4Mb design as well as results of recent characterization and radiation test of the first pass of prototype parts


ieee aerospace conference | 2010

Characterization and qualification of radiation hardened nonvolatile phase change memory technology

John C. Rodgers; Leonard Rockett; Jon Maimon; Thomas M. Storey; Paul Nixon

BAE Systems has developed a 4Mb Non-Volatile Chalcogenide Random Access Memory (C-RAM) optimized for the radiation environments encountered in spacecraft applications. C-RAM is a phase change memory with a unique combination of features that collectively provide a high-density, low-power, non-volatile memory solution that is radiation hardened and meets rigorous reliability requirements. The device has completed QML-Q qualification testing and is now in full production. Flight qualified C-RAM will serve the critical need for rad hard nonvolatile RAM in strategic space and military applications. This paper describes the 4Mb C-RAM product and presents the results of C-RAM QML-Q qualification testing including detailed analyses of the test results in all the radiation environments. 1 2


SPACE TECHNOLOGY AND APPLICATIONS INTERNAT.FORUM-STAIF 2004: Conf.on Thermophys.in Microgravity; Commercial/Civil Next Gen.Space Transp.; 21st Symp.Space Nuclear Power & Propulsion; Human Space Explor.; Space Colonization; New Frontiers & Future Concepts | 2004

Progress on a New Non‐Volatile Memory for Space Based on Chalcogenide Glass

J. Maimon; Kenneth K. Hunt; John C. Rodgers; Laura Burcin; K. Knowles

We report on the progress of a recent addition to non‐volatile solid state memory technologies suited for space and other ionizing radiation environments. We summarize the material and processing science behind the current generation of chalcogenide phase‐change memories fabricated on CMOS structures. The chalcogenide material used for phase‐change applications in rewritable optical storage (Ge2Sb2Te5) has been integrated with a radiation hardened CMOS process to produce 64kbit memory arrays. On selected arrays electrical testing demonstrated up to 100% memory cell yield, 100ns programming and read speeds, and write currents as low as 1mA/bit. Devices functioned normally from − 55°C to 125°C. Write/read endurance has been demonstrated to 1 × 108 before first bit failure. Radiation results show no degradation to the hardened CMOS or effects that can be attributed to the phase‐change material. Future applications of the technology are discussed.


european conference on radiation and its effects on components and systems | 2007

Traditional methods shortfall in predicting modern microelectronics behavior in space

Nadim F. Haddad; James H. Bowman; Ronald D. Brown; Reed K. Lawrence; John C. Rodgers; Robert A. Reed

Technology scaling in modern day microelectronics has introduced characteristics and limitations that impacted radiation testing and modeling to the point that rendered traditional methods and practices obsolete in many cases. There is a need to rethink test methodologies, procedures and models in order to predict the true behavior of these technologies in space. In this paper we hope to highlight some of our experiences in order to encourage the development of improved test and prediction methodologies as they apply to modern microelectronics.


european conference on radiation and its effects on components and systems | 2001

Radiation effects on high performance spaceborne electronics

R.W. Berger; Ronald D. Brown; Scott Doyle; Nadim F. Haddad; P. Kapcio; John C. Rodgers; N. Wood

A significant debate has risen from the desire to achieve increased on-board processing capability through the use of commercial components in space. This paper analyses the increasing susceptibility of modern commercial electronics to radiation and considers alternative mitigation approaches.


radiation effects data workshop | 2017

Single event effects characterization of BAE systems RADNET™ 1848-PS RapidIO® packet switch

Andrew T. Kelly; John C. Rodgers; Stephen Johnson; Ronald D. Brown; Aaron Adamson

Heavy ion and proton single event effects characterization data on BAE Systems RADNET 1848-PS Application Specific Standard Product are presented. The RADNET 1848-PS is a Serial RapidIO packet switch capable of running at rates up to 3.125 Gbaud. An at-speed SRIO network test for SEE cross section measurement is used to estimate soft error rates for observed upset modes in a reference orbit environment.

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Kenneth K. Hunt

Air Force Research Laboratory

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Jonathan Maimon

Air Force Research Laboratory

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