John D. Blackwell

Development of hybrid CMOS visible focal plane arrays at Rockwell

Silicon-based hybrid CMOS visible focal plane array (FPA) technology is emerging as a strong contender for scientific applications that require broad spectral response with low noise, highly integrated functionality and radiation hardness. CMOS-based FPAs offer many advantages in high speed, low-noise detection and signal processing. As a high performance alternative to advanced CCD imaging arrays, the hybrid design enables independent optimization of the silicon detector array and silicon readout electronics. Multiplexer commonality with the instruments IR channels is another attractive feature for integrators of sensor sites such as for hyperspectral spectrometers. In this paper, the technical merits of Rockwells CMOS-based hybrid visible FPAs are described including key detector performance aspects, interface electronics requirements, radiation hardness and concomitant implications for diverse imaging applications. At this time we have developed 640 X 480 and 1024 X 1024 hybrid imagers with approximately equals 100% optical fill factor, high broadband QE spanning ultraviolet (UV) through near infrared (NIR), wide dynamic range, and high pixel operability. Dark current of approximately equals 0.01e-/sec and read noise approximately equals 6e- have been measured on one prototype 1024 X 1024 FPA that uses Hawaii readout integrated circuit (ROIC). Initial radiation data indicate a total ionization dose (TID) tolerance greater than 35 Krad for our standard CMOS process.

Low-cost high-performance InSb 256 x 256 infrared camera

The current advances in density and performance of 2-D staring IR FPAs are now enabling the development of solid state non-scanning imagers of TV quality. Significant cost reductions with performance improvements are accomplished using these new high density staring arrays. This paper reports on the development of an IR imager using a new system oriented 256 X 256 InSb hybrid FPA. Two-dimensional InSb hybrid FPAs were first reported on in 1978 at the IEDM with papers describing 32 X 32 arrays using indium bumps and CCD multiplexers. This basic technology has progressed to 256 X 256 and large arrays using HgCdTe and InSb detectors. The arrays are still interconnected with indium bumps but rely on improved MOS switched readouts using the latest in CMOS process technology. Significant improvements in performance and operability as well as system implementation have also been made.

Latest results on HgCdTe 2048x2048 and silicon focal plane arrays

The worlds first 2048 X 2048 HgCdTe infrared focal plane array (FPA) has been developed by Rockwell Science Center for infrared astronomy. The Hawaii-2 is the largest CMOS multiplexer designed to date, developed to interface with both infrared and visible detector arrays. The 18 micrometer pixel pitch was selected to accommodate both reasonable telescope optics and maximize yield in the fabrication of such a large readout. The fabrication uses world-class submicron photolithography to maximize yield of high quality devices. We will report on the characterization of FPAs using the Hawaii-2 multiplexer mated to SWIR detector arrays with a spectral response of 0.9 micrometer to 2.5 micrometer. These detector arrays have been processed on Liquid Phase Epitaxy (LPE) HgCdTe on sapphire substrates, also known as PACE-1. We also report on characterization of Silicon detectors in terms of their quantum efficiency, spectral response, and dark current.

Ultra-low-noise high-frame-rate ROIC for visible and infrared focal plane arrays

Recent advances in CMOS read-out integrated circuit (ROIC) design have helped achieve 10e- of read noise with single read and down to 5e- read noise with 32-pair Fowler sampling at slower astronomical frame rates. However, applications like adaptive optics pose even more stringent performance requirements on ROICs for visible and IR focal plane arrays (FPAs). Traditional pixel designs use circuits such as source followers, capacitive trans-impedance amplifiers (CTIA), and buffered-direct injection (BDI) for detector charge integration and readout. Currently these techniques by themselves do not achieve sub 10e- read noise at high readout bandwidths. This paper describes circuit design advances and measured performance that enable ROICs with ultra-low noise readout (3-10e-) at signal bandwidths allowing KHz frame rate on 128x128 and larger arrays. Using deep sub-micron CMOS, high conversion gain has been designed in a small unit-cell area while keeping high bandwidth for reset and readout, and sufficiently low power dissipation to avoid MOSFET self-emission for background-limited sensitivity at ultra-low scene backgrounds. Measured performance of one of the pixel designs reported in detail shows a noise floor of 7e- with HgCdTe detector array, near identical to the design value.

128 x 128 MWIR InSb focal plane and camera system

The need for increased resolution and sensitivity in IR systems applications has provided the impetus for the development of high-performance second-generation staring focal plane array technology. Previously, the availability of these focal plane array components has been limited and the costs associated with delivery of useful hardware have been high. Utilizing proven InSb detector technology and foundry silicon CMOS processes, a high performance, affordable hybrid focal plane array and support electronics system has been developed. The 128 X 128 array of photovoltac InSb detectors on 50 micrometers centers is interfaced with the silicon readout by aligning and cold welding indium bumps on each detector with the corresponding indium bump on the silicon readout. The detector is then thinned so that it can be illuminated through the backside. The 128 X 128 channel signal processing integrated circuit performs the function of interfacing with the detectors, integrating the detector current, and multiplexing the signals. It is fabricated using a standard double poly, single metal, p-well CMOS process. The detector elements achieve a high quantum efficiency response from less than 1 micrometers to greater than 5 micrometers with an optical fill factor of 90%. The hybrid focal plane array can operate to a maximum frame rate of 1,000 Hz. D* values at 1.7 X 1014 photons/cm2/sec illumination conditions approach the BLIP value of 9.4 X 1011 cm(root)Hz/W with a capacity of 4 X 107 carriers and a dynamic range of greater than 60,000. A NE(Delta) T value of .018 C and a MRT value of .020 C have been measured. The devices operate with only 3 biases and 3 clocks.

SIDECAR ASIC - Control Electronics on a Chip

The SIDECAR ASIC is a custom-designed integrated circuit for controlling high performance focal plane arrays. It includes 36 parallel analog input channels, each providing pre-amplification coupled with 12-bit or 16-bit A/D converters. In addition, the micro-controller based SIDECAR ASIC provides full programmability for bias and clock generation as well as a number of digital processing features. It has been developed for space-based as well as ground-based applications. Excellent performance has been demonstrated both at room temperature and at cryogenic temperatures down to 37 K in conjunction with the HAWAII-2RG multiplexer. The ASIC has been selected by NASA for use in all three JWST near-infrared instruments and is in the process of full space qualification.

The SIDECAR ASIC — Focal Plane Electronics on a Single Chip

Traditionally, focal plane arrays require extensive external focal plane electronics (FPE) to provide clocks and biases as well as to digitize the analog output signals. The FPE has to be well-designed and is typically large, heavy and powerhungry. Most importantly, the FPE has to be placed some distance away from the FPA, which complicates maintaining low noise performance throughout the complete system. To offer an alternative to the discrete electronics, Rockwell Scientific has developed a new approach known as the SIDECAR application-specific integrated circuit (ASIC). This single chip provides all the functionality necessary to operate an infrared array with the convenience of a pure digital interface to the outside world. This paper will present performance data on the latest generation of the SIDECAR ASIC operating the JWST H2RG detector arrays at cryogenic temperature. The test results demonstrate that an ASIC based FPA system will meet or exceed all performance requirements for the JWST mission. The SIDECAR ASIC has been selected by NASA to become the FPA drive electronics for all shortwave infrared instruments on JWST.

Three Dimensional Ladar Focal Plane Array Development at Rockwell Scientific: An Update

We have developed a three-dimensional (3D) imaging ladar focal plane array (FPA) for military and commercial applications. The FPA provides snap-shot, direct detection, high-resolution range and range-sampled intensity imaging capability on a single chip. The FPA is made of a 64x64 element, 100-μm pixel pitch detector array that is directly bump bonded to a matched CMOS based silicon readout integrated circuit (ROIC) with parallel ladar signal processing at each pixel. A room temperature, SWIR InGaAs detector variant for imaging near 1.5-μm wavelengths and a cooled MWIR HgCdTe detector variant for imaging near 3-μm to 5-μm wavelengths have been fabricated. We have built a prototype SWIR FPA, integrated it to a compact, transportable SWIR flash ladar transceiver, and collected initial range images outdoors. We present the measured performances of the detector, the readout, and the image data collected with the focal plane array.

High-resolution extended NIR camera

A High Resolution Near-Infrared (NIR) Camera has been developed and tested. This NIR camera uses a HgCdTe detector array which allows for imaging at high operating temperatures. The cameras format is 640x512 pixels with an 18 μm pitch. We have obtained high broadband spectral response from 0.9 to 2.0 micron with near 100% optical fill factor. The camera is designed as a turnkey system that uses the industry standard Camera Link digital interface. The electronics are located remotely from the sensor head allowing it to be adapted to existing optical systems. This compact camera has been targeted for military, scientific and telecommunication applications. This paper will detail the measured camera performance.

Portable high-performance staring infrared camera

This paper reports on continuing improvements in the performance and producibility of InSb focal plane arrays, which together with progress in self-contained dewar/cooler designs have resulted in a new level of portable infrared camera functional capability. A new camera will also take advantage of the latest advances in integrated circuit miniaturization and electronic package fabrication to achieve the lowest possible size, weight, and power consumption while meeting its design goals for ruggedness and reliability.