John D. Irish
IBM
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Publication
Featured researches published by John D. Irish.
international conference on computer design | 1994
John Michael Borkenhagen; Glen Howard Handlogten; John D. Irish; Sheldon B. Levenstein
An implementation of the 64-bit PowerPC Architecture optimized for the IBM AS/400 commercial environment is described. This 64-bit BiCMOS semicustom implementation runs at a clock rate of 170 MHz. The processor features a 4-way superscalar pipelined fixed point unit which can dispatch and execute up to 4 instructions each cycle, a floating point unit with a peak rate of 500 MFLOPs, 8-Kbyte L0 instruction cache, 256-Kbyte L1 cache, and support for 64-Gbyte of main storage. A 4-way rightly-coupled symmetric multi-processor system is one of several configurations supported by this implementation.<<ETX>>
Archive | 1990
Russell D. Hoover; John D. Irish; David Wesley Sollender
Archive | 2001
Stephen Paul Morgan; John D. Irish; Frank Michael Pittelli; Michael David Varga
Archive | 1999
Donald Lee Freerksen; Gary Michael Lippert; John D. Irish
Archive | 2006
John D. Irish; Chad B. McBride
Archive | 1994
David John Krolak; Lyle Edwin Grosbach; Sheldon B. Levenstein; John D. Irish
Archive | 2002
Jeffrey Douglas Brown; John D. Irish; Steven R. Kunkel
Archive | 1999
John Michael Borkenhagen; Gerald Gregory Fagerness; John D. Irish; David John Krolak
Archive | 1996
Donald Lee Freerksen; Farnaz Mounes-Toussi; Peder James Paulson; John D. Irish; Lyle Edwin Grosbach
Archive | 2003
John D. Irish; Ibrahim A. Ouda; James A. Steenburgh; Jason Andrew Thompson
