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Publication
Featured researches published by Sheldon B. Levenstein.
international conference on computer design | 1994
John Michael Borkenhagen; Glen Howard Handlogten; John D. Irish; Sheldon B. Levenstein
An implementation of the 64-bit PowerPC Architecture optimized for the IBM AS/400 commercial environment is described. This 64-bit BiCMOS semicustom implementation runs at a clock rate of 170 MHz. The processor features a 4-way superscalar pipelined fixed point unit which can dispatch and execute up to 4 instructions each cycle, a floating point unit with a peak rate of 500 MFLOPs, 8-Kbyte L0 instruction cache, 256-Kbyte L1 cache, and support for 64-Gbyte of main storage. A 4-way rightly-coupled symmetric multi-processor system is one of several configurations supported by this implementation.<<ETX>>
Archive | 1997
John Michael Borkenhagen; Richard James Eickemeyer; William Thomas Flynn; Sheldon B. Levenstein; Andrew Henry Wottreng
Archive | 1996
John Michael Borkenhagen; Richard James Eickemeyer; Sheldon B. Levenstein; Andrew Henry Wottreng; Duane Arlyn Averill; James Ira Brookhouser
Archive | 1997
John Michael Borkenhagen; Richard James Eickemeyer; William Thomas Flynn; Steven R. Kunkel; Sheldon B. Levenstein; Andrew Henry Wottreng
Archive | 1997
David John Krolak; Sheldon B. Levenstein
Archive | 2004
Guy Lynn Guthrie; Sheldon B. Levenstein; William J. Starke; Derek Edward Williams
Archive | 2005
Michael Stephen Floyd; Larry Scott Leitner; Sheldon B. Levenstein; Scott Barnett Swaney; Brian W. Thompto
Archive | 1992
Sheldon B. Levenstein
Archive | 1989
Richard Glenn Eikill; Sheldon B. Levenstein
Archive | 1994
David John Krolak; Lyle Edwin Grosbach; Sheldon B. Levenstein; John D. Irish
