John L. Fagan
Westinghouse Electric
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Featured researches published by John L. Fagan.
international solid-state circuits conference | 1974
Donald R. Lampe; Marvin H. White; John L. Fagan; J. Mims
A basic building block constructed with CCD and MNOS technologies will be described. The tap weights are analog and electrically reprogrammable to realize Fourier transformers, matched filters and correlators, and adaptive filters.
international electron devices meeting | 1974
Marvin H. White; Donald R. Lampe; John L. Fagan; D. A. Barth
The combination of CCD and MNOS devices for signal transfer and nonvolatile storage has been discussed by several workers 1–3. In the initial attempt to combine these structures 1 the MNOS storage site was located inside a stepped dielectric, 2φ, CCD shift register. Certain problems were encountered such as inadequate charge handling capability which resulted in poor write characteristics, ineffective write/inhibit operation since high voltage clocks (for good transfer efficiency) caused spurious write operation, poor read operation due to the large access time to first bit and small detection window, and degraded memory retention caused by a small write window and read-disturb effects. To alleviate these problems a compact, nonvolatile, charge-addressed memory (NOVCAM) cell was introduced 2 for block oriented random access memory (BORAM) applications. The NOVCAM cell is composed of a CCD shift register and a thin-oxide MNOS memory structure in parallel with the register to provide separate locations for signal address and storage. Charge is transferred from the CCD shift register to the MNOS structure with a transfer gate φ T which results in a collapse of the surface potential beneath the MNOS structure. Once the surface potential is collapsed, the oxide electric field strength increases and the tunneling of signal charge commences from the surface channel into deep traps located near the Si0 2 /Si 3 N 4 interface. The read-out is nondestructive (NDRO) and accomplished through the control action of the MNOS surface potential which gates the parallel charge injection from a P+ source diffusion into the CCD shift register.
international solid-state circuits conference | 1976
Marvin H. White; I. Mack; F. Kub; Donald R. Lampe; John L. Fagan
This paper will describe a monolithic MOS/bipolar floating clock electrode sensor which nondestructively transforms a signal charge in a CCD to an output tap voltage that is multiplied by a tap weight derived from a variable conductance.
international solid-state circuits conference | 1976
John L. Fagan; Marvin H. White; Donald R. Lampe
A high density, read/write, 16K-bit (0.5 mil2/bit) non-volatile charge-addressed memory with TTL compatibility and full decoding will be described. The memory cell is a MNOS structure with crosspoint geometry and address-decode features.
Archive | 1977
John L. Fagan
international electron devices meeting | 1973
Marvin H. White; Donald R. Lampe; John L. Fagan
Archive | 1976
John L. Fagan; Marvin H. White; Donald R. Lampe
Archive | 1977
Philip C. Smith; John L. Fagan
Archive | 1978
Philip C. Smith; John L. Fagan
Archive | 1978
John L. Fagan