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Featured researches published by John Sanchez.


non volatile memory technology symposium | 2008

Oxide dual-layer memory element for scalable non-volatile cross-point memory technology

Rene Meyer; Lawrence Schloss; Julie Casperson Brewer; Roy Lambertson; Wayne Kinney; John Sanchez; Darrell Rinerson

We report a dual oxide layer as the active memory element of a scalable nonvolatile cross-point memory technology. The resistance change memory element is formed by a conductive metal oxide adjacent to an oxide tunnel barrier. Varying the as-deposited tunnel barrier thickness allows for control of the nominal current density and is targeted to meet the cell requirements for an ultra high density cross-point architecture. Excellent scaling of program and erase currents with electrode area and a continuous transition between program and erase state indicate that a uniform rather than a filamentary switching mechanism controls the device current both in the high and the low resistive state. A prior forming step is not required. The observed resistance change is caused by the exchange of oxygen ions between the conductive metal oxide and the tunnel oxide. Ion motion at room temperature is enabled by an exponential increase of the ion mobility under high electric fields during program and erase operations. The resistive switching effect of the device is explained by a change in the tunneling current due to an increase or decrease in effective tunnel barrier height. The barrier height varies due to changes in charge within the barrier as a result of oxygen ions moving in to or out of the tunnel barrier.


Archive | 2005

Memory using mixed valence conductive oxides

Darrell Rinerson; Christophe J. Chevallier; Wayne Kinney; Roy Lambertson; Steven W. Longcor; John Sanchez; Lawrence Schloss; Philip F.S. Swab; Edmond R. Ward


Archive | 2003

Resistive memory device with a treated interface

Darrell Rinerson; Wayne Kinney; John Sanchez; Steven W. Longcor; Steve Kuo-Ren Hsia; Edmond R. Ward; Christophe J. Chevallier


Archive | 2006

Multi-resistive state element with reactive metal

Darrell Rinerson; Wayne Kinney; Edmond R. Ward; Steve Kuo-Ren Hsia; Steven W. Longcor; Christophe J. Chevallier; John Sanchez; Philip F.S. Swab


Archive | 2004

MEMORY ELEMENT HAVING ISLANDS

Darrell Rinerson; Christophe J. Chevallier; Philip F.S. Swab; Steve Kuo-Ren Hsia; John Sanchez; Steven W. Longcor


Archive | 2009

Multi-resistive state memory device with conductive oxide electrodes

Darrell Rinerson; Wayne Kinney; Edmond R. Ward; Steve Kuo-Ren Hsia; Steven W. Longcor; Christophe J. Chevallier; John Sanchez; Philip F.S. Swab


Archive | 2009

Two-terminal reversibly switchable memory device

Darrell Rinerson; Christophe J. Chevallier; Wayne Kinney; Roy Lambertson; John Sanchez; Lawrence Schloss; Philip F.S. Swab; Edmond R. Ward


Archive | 2008

Method for fabricating multi-resistive state memory devices

Darrell Rinerson; Wayne Kinney; Edmond R. Ward; Steve Kuo-Ren Hsia; Steven W. Longcor; Christophe J. Chevallier; John Sanchez; Philip F.S. Swab


Archive | 2005

Movable terminal in a two terminal memory array

Darrell Rinerson; Christophe J. Chevallier; John Sanchez; Lawerence Schloss


Archive | 2014

Memory Element With A Reactive Metal Layer

Christophe J. Chevallier; Steve Kuo-Ren Hsia; Wayne Kinney; Steven W. Longcor; Darrell Rinerson; John Sanchez; Philip F.S. Swab; Edmond R. Ward

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