John X. Przybysz

Pulse-driven Josephson digital/analog converter [voltage standard]

The authors have designed and demonstrated a pulse-driven Josephson digital/analog converter. When used as a programmable voltage standard, this device can synthesize metrologically accurate ac waveforms as well as stable dc voltages. We show through simulations that Josephson quantization produces a nearly ideal quantization noise spectrum when a junction is driven with a typical waveform produced by a digital code generator. This technique has been demonstrated in preliminary experiments with arrays of 1000 junctions clocked at frequencies up to 6 Gb/s, where sine waves of a few millivolts in amplitude were synthesized at frequencies up to 1 MHz.

Josephson sigma-delta modulator for high dynamic range A/D conversion

A Josephson sigma-delta modulator suitable for use in high dynamic range conversion of MHz bandwidth signals was designed and simulated. Input signal voltages were integrated as current in a superconducting inductor. A single junction quantizer provided analog-to-digital (AID) conversion at 40 GHz and fed back single-flux-quantum (SFQ) voltage pulses to balance the input. A JSIM calculation for a 13,110,000-ps interval indicated ideal first-order noise shaping of a 2.44-MHz voltage-source signal. Spur free dynamic range was 102 dB and signal-to-noise-and-distortion was 98 dB on the DC 10-MHz signal band, equivalent to a 16-b, 20-MSample/s, Nyquist-rate A/D. The modulator transfer function was derived for a current-source signal applied to an input resistor. First-order quantization noise suppression was still observed for signal bands wider than the 2 pi R/L modulator cutoff frequency. The superconductive sigma-delta modulator combines the speed of Josephson junctions for GHz sampling and digital filtering with the quantum mechanical accuracy of SFQ feedback to obtain superior A/D performance.<<ETX>>

Two-loop modulator for sigma-delta analog to digital converter

A two-loop modulator has been designed for a superconductive sigma-delta analog to digital converter. In contrast to semiconductor modulators, which use high-gain amplifiers in the signal feed forward path, the superconductive modulator used digital gain in the signal feedback path. The use of superconductive electronics to precisely feed back a single flux quantum into the second integrator loop and multiple flux quanta into the first integrator loop is a key to this circuit. In simulations of a 40 GHz sampling rate, the modulator obtained a 98 dB signal to noise ratio on the dc-60 MHz band. The modulator tolerated thermal noise well, obtaining 98 dB SNR on the dc-4 MHz band, while sampling at a rate of 4 GHz. The modulator tolerated clock timing jitter better than Nyquist-rate A/D converters, obtaining equivalent performance with 3 times as much rms jitter. Compared to single-loop sigma-delta and oversampled lobe-counting A/D converters, the two-loop modulator can achieve equivalent performance at a significantly reduced sampling and digital filter rate.<<ETX>>

Margins and yields of SFQ circuits in HTS materials

An analytical model has been developed to project the yield of superconductive integrated circuit chips as a function of circuit operating margins, fabrication process control, and component count. For Gaussian distributed deviations of critical component values from design specifications, chip yield was a highly nonlinear (threshold) function of the ratio of circuit margin to process standard deviation. Computer simulations of single-flux-quantum (SFQ) logic gates with model high-temperature superconductor (HTS) superconductor-normal-metal-superconductor (SNS) junctions operating at GHz clock rates showed at least 50-70% of the margins of similar Nb-Al/sub 2/O/sub 3/-Nb based circuits. Margins and maximum clock rate improved as I/sub c/R/sub n/ (critical-current-normal-resistance product) was increased from 200 to 500 mV.<<ETX>>

Interface circuits for chip-to-chip data transfer at GHz rates

Interface circuits for the transfer of data between Single Flux Quantum (SPQ) circuits have been designed, fabricated, and operated at speeds up to 3 Gigabits per second. The circuit employed an improved version of the SFQ/Latch converter, a Modified Variable Threshold Logic (MVTL) OR/AND gate, a 3/spl times/ latching amplifier, and a 3/spl times/-to-10/spl times/ latching amplifier. The amplifier circuits employed stacks of latching junctions. Resistors between the parallel stacks of junctions damped residual currents to prevent flux trapping during reset. Tolerance to critical current variations in the series stacks of junctions was provided by inductive chokes on the input junction shunting resistors. Microwave modeling programs were used to ensure proper distribution of the applied current to all of the latching elements. The circuit transferred data at 3 Gigabits per second from one SFQ circuit up to room temperature and back to another SFQ circuit through 3.4 meters of 50-ohm cable.

A single flux quantum shift register operating at 65 K

We report the fabrication and quasi-static testing of a two-stage, high-temperature superconducting, Single Flux Quantum shift register. The five-junction circuit was fabricated using a single YBCO film, with step-edge grain boundary junctions. Storage of flux, and its motion in response to LOAD and SHIFT signals, was demonstrated at 65 K.<<ETX>>

Characterization of a superconductive sigma-delta analog to digital converter

Sigma-delta analog to digital converters (ADCs) use a combination of oversampling and feedback to concentrate quantization noise outside the frequency band of interest. Subsequent digital filtering can then be used to suppress the quantization noise and yield a large signal to noise ratio. Sigma-delta ADCs dominate the high performance audio market, where the signal band is limited to frequencies below 50 kHz and 8 octave oversampling requires a sampling rate of only 25.6 MHz. Przybysz et al. have described a superconductive circuit capable of >40 GHz sampling, thereby extending the useful bandwith to tens of MHz. In this paper, we describe the realization of that circuit and present measurements of its performance. Spectral analysis of the modulator performance shows spur-free dynamic range of over 78 dB and third order intermodulation products less than -68 dBc. Quantization noise shaping is also demonstrated.<<ETX>>

An 8-bit carry look-ahead adder with 150 ps latency and sub-microwatt power dissipation at 10 GHz

Reciprocal quantum logic combines the speed and power-efficiency of single-flux quantum superconductor devices with design features that are similar to CMOS. We have demonstrated an 8-bit carry look-ahead adder in the technology using combinational gates with fanout of four and non-local interconnect. Measured power dissipation of the fully active circuit is only 510 nW at 6.2 GHz. Latency is only 150 ps at a clock rate of 10 GHz.

Flux quantum sigma-delta analog-to-digital converters for rf signals

The sigma-delta architecture is the method of choice for analog-to-digital converters (ADCs) for high dynamic range applications. This architecture uses oversampling and precise feedback to generate a shaped spectral distribution of the quantization noise. Subsequent digital filtering suppresses out-of-band quantization noise, yielding a large signal to in-band noise ratio. A unique advantage of superconducting electronics is the availability of the flux quantum to provide quantum mechanically accurate feedback at GHz rates. Josephson digital technology extends sigma-delta ADCs from MHz sampling rates to GHz sampling rates, from kHz signal bandwidths to MHz signal bandwidths, with comparable or better dynamic range when compared to semiconductor implementations. This paper presents circuits for Josephson sigma-delta ADCs, including single-loop and double-loop modulators operating at sampling rates up to 2 GHz, and circuits for quantized feedback. The first demonstration of double-loop noise shaping is also presented.

Superconducting modulators for high dynamic range delta-sigma analog-to-digital converters

Superconducting digital circuits are capable of producing high dynamic range analog-to-digital converters (ADCs). We present sigma-delta architectures using large (>100) oversampling ratios to give signal-to-noise ratios of greater than 100 dB in simulation. Three distinct designs, using two distinct mechanisms for feedback, are presented. All of the designs use only shunted junctions, and are therefore compatible with HTS SNS junctions. Simulations are presented for a modulator which creates feedback pulses by SQUID lobe-crossings, a modulator which uses the transresistance of a SQUID for feedback, and a modulator which uses threshold crossings in both the first and second loops for feedback.