Jong-Gwan Yook

Characterization of high frequency interconnects using finite difference time domain and finite element methods

MIC and MMIC packages capable of good performance at frequencies as high as 60 GHz need to have small volume, low weight, microstrip and/or coplanar waveguide (CPW) compatibility and exhibit negligible electrical interference with the rest of the circuit. In order to acquire some of these characteristics, special provisions need to be made during circuit layout and design, resulting in high-density packages. The designed circuits have a large number of interconnects which are printed on electrically small surface areas and communicate through the substrate in a direct through-via fashion or electromagnetically through appropriately etched apertures. In a circuit environment of this complexity, parasitic effects such as radiation and cross talk are intensified, thus, making the vertical interconnection problem very critical. In this paper, transitions using through-substrate vias are considered and analyzed both in the time and frequency domains using the Finite Difference Time Domain (FDTD) technique and the Finite Element Method (FEM), respectively. The merits of each method in conjunction with accuracy, computational efficiency and versatility are discussed and results are compared showing excellent agreement. Specifically, a microstrip short-circuit, a microstrip ground pad, a CPW-to-microstrip through-via transition and a channelized CPW-to-microstrip transition are analyzed and their electrical performance is studied. >

Application of system-level EM modeling to high-speed digital IC packages and PCBs

A system-level electromagnetic (EM) modeling tool combining a three-dimensional (3-D) full-wave finite-element EM-field analysis tool and a time-domain electric-circuit simulator is developed and applied to various geometries such as multilayer printed circuit boards (PCBs), signal lines embedded in a PCB or package, and split power-distribution network. Since the signal integrity is a primary concern of high-speed digital circuits, the noise distributions on various circuit planes are evaluated from the analysis. These noise distributions, often called voice maps, are utilized to identify the location of the major source of simultaneous switching noise (SSN). This information can eventually be adapted for optimum placement of decoupling capacitors to minimize the noise fluctuations on the various circuit planes on an entire PCB.

Computation of switching noise in printed circuit boards

Simultaneous switching noise (SSN) is a phenomenon with adverse and severe effects when a large number of high speed chip drivers switch simultaneously causing a large amount of current to be injected into the power distribution grid. The effects of SSN are manifested in a variety of transient and permanent system malfunctions including the appearance of undesirable glitches on what should otherwise be quiet signal lines and the flipping of state bits in registers and memories. Current approaches for dealing with SSN are largely ad hoc, relying primarily on the ability of expert designers to postulate worst-case scenarios for the occurrence of SSN-related errors and to analyze these scenarios using pessimistic estimates of packaging parasitics. This paper takes a first step toward evolving a systematic methodology for modeling and analysis of SSN in printed circuit boards (PCBs). The presented methodology adopts a combination of macro- and micro-models which allow for a system level treatment of the problem without losing the necessary detailed descriptions of the power/ground planes, the signal traces and the vertical interconnections through vias or plated holes. This approach has been applied to a variety of PCB structures and has allowed for an effective characterization of switching noise and a comprehensive understanding of its effects on PCB performance.

Experimental and theoretical study of parasitic leakage/resonance in a K/Ka-band MMIC package

In this paper, electromagnetic (EM) leakage and spurious resonances in a K/Ka-Band (18-40 GHz) MMIC hermetic package designed for a phase shifter chip are studied using the finite element method (FEM) and the numerical simulation results are compared with the measured data. Both the measured and calculated data indicate several spurious resonances in the 18-24 GHz region and the origin of this phenomenon is identified by virtue of the modeling capability of the FEM. Moreover, the effect of dc bias lines, bond wires, shielding, and the asymmetry of the package on electrical performance are closely examined. In addition, the effect of adding a resistive coating to the inside surface of the package lid and also the use of dielectric packaging materials with very high loss tangent are studied in view of the suppression of the spurious resonances. Finally, design guidelines for the improved package are presented.

W-Band Micromachined Vertical Interconnection for Three-Dimensional Microwave ICs

A novel vertical interconnection utilizing finite ground coplanar waveguide (FGCPW) and silicon micromachining has been developed for W-band The measured results indicate insertion loss of only 0.6 dB. This transition uses standard processing techniques and is a compact, 520 ¿m width and 520 ¿m length, design. With this vertical interconnect, multiple IC layers may be connected to achieve new levels of high density, low loss integration.

A study of hermetic transitions for microwave packages

Two numerical techniques, the finite difference in time domain (FDTD) and the finite element method (FEM) in frequency domain, are employed to characterize microstrip hermetic transition geometries in an effort to investigate high frequency effects. Measurements performed on these transitions compare favorably with theory. It is shown that these hermetic wall transitions may suffer from parasitic parallel plate modes which however can be eliminated with the use of vias at appropriate locations. Two different transitions have been analyzed from 5 GHz to 25 GHz and have been found to be limited in performance by higher return loss as frequency increases. This indicates the need for very careful characterization of transitions intended for use in microwave and millimeter-wave applications.<<ETX>>

Theoretical and experimental study of microstrip-to-slot line uniplanar transition

Recent advances in MMIC technology makes it possible to construct transitions from CPW-to-microstrip with via hole, microstrip-to-slot line and microshield line-to-CPW all of which have potential applications in the feed network of antennas. In this study we investigated the characteristics of the microstrip-to-slot line uniplanar transition using the finite element method (FEM) and finite difference time domain (FDTD) technique, and compared the theoretical results with the measurements. In both cases, the results agree with the measurements within a few percent.<<ETX>>

Computation of switching noise in PCBs for digital packages

Simultaneous switching noise in printed circuit boards for digital packages is computed using a hybrid technique which combines electromagnetic analysis (3D FEM) and circuit simulation (HSPICE) for fast and efficient time and frequency domain analysis.

Evaluation of ground inductance in printed circuit boards

The problem of a printed circuit board (PCB) via is analyzed through the scattering parameter and the flux methods. The two results are compared in an effort to establish the relationship between the two techniques and evaluate their contributions. A ground via in a one-port and two-port configuration is studied in the time and frequency domains using the finite difference time domain (FDTD) and the finite element method (FEM) respectively. The scattering parameters for the via configuration are computed and compared for validation purposes.<<ETX>>

Experimental and theoretical study of parasitic leakage/resonance in a K/Ka-Band MMIC package(003) 5336168

In this paper, electromagnetic leakage and spurious resonances in a K/Ka-band (18-40 GHz) MMIC hermetic package designed for a phase shifter chip are studied using the finite element method (FEM) and the numerical simulation results are compared with measured data. Both in measured and calculated data several spurious resonances are observed in the 18 to 24 GHz region and the origin of this phenomenon is identified by virtue of the modeling capability of the FEM.