Tawfik Arabi

Design and validation of a power supply noise reduction technique

For the high-performance microprocessors with high-bandwidth I/O, the power supply noise needs to be controlled to ensure reliable high speed bus operation. This is generally done with high-quality package capacitors. These capacitors are generally lower equivalent series inductance (ESL) and lower equivalent series resistor (ESR). In this paper, we will present two implementations of an approach of using on-die resistors in series with the package capacitance to dampen the high-frequency noise. We will show by validation on the 90-nm technology that this technique is capable of reducing the noise by nearly 80% without adversely affecting the timings. The results of several validation experiments, including the measurement of noise and impedance of the I/O power delivery, and the post-layout simulation will also be presented.

Enhanced thermal management for future processors

An enhanced thermal management mechanism that reduces power by scaling frequency and voltage in response to excessive temperatures is presented. The voltage transition process is done transparently to the execution of applications. The enhanced mechanism achieves an /spl sim/50% power reduction while limiting the performance impact to only /spl sim/20% for the duration of the thermal event. The approach allows the processor to meet its performance and reliability goals without additional thermal solution costs.

An Algorithm-Centric Energy Aware Design Methodology

The goal of this brief is to present a unique top-down design methodology for developing energy-aware algorithms based on energy profiling. The key idea revolves around identifying and measuring components of code with high energy consumption. There are two major contributions of this brief: 1) a method for identifying components with high energy consumption in compute-intensive applications. To this end, we target operations called kernels, which are frequently used operations in the algorithm; 2) a method for estimating software energy for the identified software components, in particular for kernels and load/store operations. The energy evaluation method involves isolated code with assembly injection. Furthermore, to ensure reliable results, we use physical energy measurements conducted on specially instrumented circuit boards to provide actual and not just simulated measurements. To evaluate the proposed methods, we conducted two case studies using data mining algorithms: K-nearest neighbors and linear regression. The results highlight the contributions of kernels and memory energy to total energy.

An approach to measuring power supply impedance of microprocessors

A technique to calculate the relative on die power supply impedance of high power CMOS integrated circuits as a function of frequency is described. This approach uses the power supply current variation that is normally present in a microprocessor to stimulate the supply network, varying the clock rate of the processor in order to obtain multiple measurements. Using this technique the power supply impedance vs. frequency of a 0.18 /spl mu/m microprocessor was measured and compared to a simple lumped circuit model.

Electric field integral equation formulation for a dynamic analysis of nonuniform microstrip multi-conductor transmission lines

A moment-method technique based on using a combined quasi-dynamic, dynamic, and asymptotic approach is presented for the analysis of nonuniform microstrip transmission lines and discontinuities. It uses the grounded dielectric slab Greens functions. The regions of validity of the quasi-dynamic and asymptotic approximations are determined in terms of the required accuracy in the Greens functions. Numerical examples are presented and compared with available data to check the accuracy of the technique. >

Time domain analysis of lossy multi-conductor transmission lines using the Hilbert transform

A novel approach of using the Hilbert transform to enforce the causality requirements on the electromagnetic fields in the analysis of high-speed digital circuits is presented. The technique is particularly useful in the absence of extremely accurate broadband data for the complex permittivity of lossy dielectric materials. In order to validate the accuracy and usefulness of this approach, several numerical examples have been solved and compared to lossless and traditional noncausal models. Specifically, the authors consider the example of a two-conductor microstrip transmission line and compute the response of the line using a lossless, a conventional lossy, and the Hilbert transform lossy model.<<ETX>>

Design and performance evaluation of Pentium/sup R/ III microprocessor packaging

This paper describes a design methodology to determine the number of chip capacitors needed and its placement scheme for the latest Pentium/sup R/ III microprocessor package substrate for optimum performance. The effect of capacitors on the power supply and its performance and placement schemes are discussed and compared against measurements. Performance improvements are outlined and compared between the current 0.13 /spl mu/m and the previous 0.18 /spl mu/m silicon package technology designed for compatibility with existing systems.

A design methodology for the I/O power supply of next generation packaging

The method of three-dimensional I/O power modeling is reviewed in detail based on the learning from the previous one-dimensional and two-dimensional models. This paper covers the latest development of next generation microprocessor I/O power models and the adoption of a new three-dimensional modeling methodology to meet the challenging design requirements of a high performance signal bus with short turn-around times. The paper also presents a new technique of using damping resistors to attenuate the high frequency noise on the I/O supply.

VLSI challenges to more energy efficient devices

Delivering power efficiently to advanced technology VLSI is a top challenge and priority for mobile platforms. In addition, nearly 50% of the real estate on a typical mobile platform, such as a handheld, is used to convert power to the low voltages required by the advanced technology. This is so because as voltage continues to scale down with technology, the tolerances required by these circuits for reliable and energy efficient operation continues to tighten. In this presentation we review the state of the art and show a large gap between todays VLSI technology and the trends in form factor, energy efficiency regulatory specifications, and battery life requirements. We will also show how integration of the power delivery circuitry presents an opportunity for a non-linear improvements in energy efficiency of mobile devices. We will demonstrate the value of integration with models and experimentally with testchips. Finally, We will present our view of the required advancements in circuit technology, VLSI testing technology, and process technology needed to achieve such integration.

A dynamic analysis of non-uniform microstrip multi-conductor transmission lines using the grounded slab Green's functions approach

The authors present a numerical technique based on a combined approach that uses a quasi-dynamic, a dynamic and an asymptotic method for the analysis of non-uniform microstrip transmission lines and discontinuities with grounded dielectric slab Greens functions. The regions of validity of several quasi-dynamic and asymptotic approximations have been compared and determined in terms of the required accuracy and the microstrip physical parameters. Numerical examples have been solved and checked with available data and measurements to analyze the accuracy of this new technique.<<ETX>>