Jong-Ho Bae

Substance P Sensitizes P2X3 in Nociceptive Trigeminal Neurons

Peripheral inflammation produces pain hypersensitivity by sensitizing nociceptors. Potentiation of P2X3 receptor activity in nociceptors may play an important role in this peripheral sensitization. However, we do not fully understand how P2X3 activity is elevated in inflammation. Thus, we investigated whether P2X3 activity in trigeminal nociceptive neurons is regulated by the neurokinin-1 (NK-1) receptor that is activated by an inflammatory mediator, substance P. Single-cell RT-PCR and immunohistochemistry revealed that NK-1 in nociceptive neurons was mainly co-expressed with P2X3. Ca2+ imaging and whole-cell patch-clamp recordings indicated that both substance P and Sar-substance P, a selective NK-1 agonist, significantly potentiated α,β-meATP-induced currents and [Ca2+]i responses in nociceptive neurons. These potentiating effects were completely blocked by GR82334, a specific NK-1 antagonist. Our results demonstrate that substance P sensitizes P2X3 receptor through the activation of NK-1, thus warranting these receptors as possible targets for pain therapy in the orofacial region. Abbreviations: α,β-methylene adenosine 5′-triphosphate (ATP), α,β-meATP; neurokinin-1, NK-1; single-cell reverse-transcription polymerase chain-reaction, single-cell RT-PCR; [Sar9,Met(O2)11]-substance P, Sar-substance P.

Characterization of traps and trap-related effects in recessed-gate normally-off AlGaN/GaN-based MOSHEMT

Traps and trap-related effects in recessed-gate normally-off AlGaN/GaN-based MOSHEMT with SiO2 gate dielectric were characterized. Hysteresis in ID-VG was observed at elevated temperature (~120°C) due to the traps. To understand the traps, current transient in drain was investigated at given gate and drain pulses with different temperatures. Two groups of time constants were extracted: one is nearly constant and the other is decreased with temperature. Extracted activation energies from the drain current transients with temperature are 0.66 eV and 0.73 eV, respectively, for given gate and drain pulses. Using extracted exponential trap density profile from frequency dependent conductance method [4], we could understand C-V behavior with frequency. It was shown that traps inside AlGaN layer are a main cause for the decrease of capacitance at high frequency in inversion region. The pulsed I-V characteristics also show frequency dependence.

Characterization of traps in 3-D stacked NAND flash memory devices with tube-type poly-Si channel structure

Trap density (D_it) was extracted for the first time in 3-D stacked NAND flash memory with the tube-type poly-Si channel structure. We verified extracted D_it with conductance method and charge pumping method in 32 nm floating gate (FG) NAND flash memory device. In 3-D stacked NAND flash memory device, the D_it extracted by conductance method was 1~2×10¹² cm^-2eV^-1 in E_c-E_T of 0.15~0.35 eV. The simulation results of I_BL-V_CG and C-V_CG based on the D_it were conformable with the measurement data. Then we investigated the effects of program/erase (P/E) cycling stress on 1/f noise in NAND flash devices. Finally, we extracted firstly the position of a trap generating random telegraph noise (RTN) by considering cylindrical coordinate and pass cell resistance in the 3-D stacked NAND flash memory cell.

Analysis of trap and its impact on InGaN-based blue light-emitting diodes using current-transient methodology

A reversible increase in the current of InGaN-based blue LEDs is observed when constant forward voltage is applied. This characteristic is assumed to be the result of trapping process, and a trap activation energy of 0.30 eV is extracted. Through a numerical simulation, it is confirmed that the multi-quantum well (MQW) barrier height is reduced by the hole trapping process and that the current is increased by lowering this barrier. We also confirmed the effect of this trap on the optical characteristics of InGaN-based blue LEDs by a numerical simulation and measurement.

Adaptive learning rule for hardware-based deep neural networks using electronic synapse devices

In this paper, we propose a learning rule based on a back-propagation (BP) algorithm that can be applied to a hardware-based deep neural network using electronic devices that exhibit discrete and limited conductance characteristics. This adaptive learning rule, which enables forward, backward propagation, as well as weight updates in hardware, is helpful during the implementation of power-efficient and high-speed deep neural networks. In simulations using a three-layer perceptron network, we evaluate the learning performance according to various conductance responses of electronic synapse devices and weight-updating methods. It is shown that the learning accuracy is comparable to that obtained when using a software-based BP algorithm when the electronic synapse device has a linear conductance response with a high dynamic range. Furthermore, the proposed unidirectional weight-updating method is suitable for electronic synapse devices which have nonlinear and finite conductance responses. Because this weight-updating method can compensate the demerit of asymmetric weight updates, we can obtain better accuracy compared to other methods. This adaptive learning rule, which can be applied to full hardware implementation, can also compensate the degradation of learning accuracy due to the probable device-to-device variation in an actual electronic synapse device.

Analysis of DC/transient current and RTN behaviors related to traps in p-GaN gate HEMT

Trap-related transient characteristics and RTN in p-GaN gate HEMT were characterized, for the first time to our knowledge. Current conduction mechanism in DC IG is explained based on proposed model. Hopping conduction mechanism is responsible for IG at VG <; 0. IG at VG > 0 seems to be controlled by thermionic emission and affected by the action of floating-base n(W)-p(p-GaN)-n(AlGaN/GaN) bipolar transistor. Transient current behavior is related to the DC conduction mechanism and could be explained by thermal emission and charge trapping in p-GaN and AlGaN layers. Measured transient behavior of gate capacitance corresponds to that of the transient currents. Hole trapping into the AlGaN layer and existence of percolation path in gate and drain currents are verified by analyzing RTNs in IG and ID. Trap position and activation energy regarding RTN are firstly extracted. RTN time constants are similar to those in IG and ID transient behavior.

Emerging memory technologies for neuromorphic computing

In this paper, we reviewed the recent trends on neuromorphic computing using emerging memory technologies. Two representative learning algorithms used to implement a hardware-based neural network are described as a bio-inspired learning algorithm and software-based learning algorithm, in particular back-propagation. The requirements of the synaptic device to apply each algorithm were analyzed. Then, we reviewed the research trends of synaptic devices to implement an artificial neural network.

A Split-Gate Positive Feedback Device With an Integrate-and-Fire Capability for a High-Density Low-Power Neuron Circuit

Hardware-based spiking neural networks (SNNs) to mimic biological neurons have been reported. However, conventional neuron circuits in SNNs have a large area and high power consumption. In this work, a split-gate floating-body positive feedback (PF) device with a charge trapping capability is proposed as a new neuron device that imitates the integrate-and-fire function. Because of the PF characteristic, the subthreshold swing (SS) of the device is less than 0.04 mV/dec. The super-steep SS of the device leads to a low energy consumption of ∼0.25 pJ/spike for a neuron circuit (PF neuron) with the PF device, which is ∼100 times smaller than that of a conventional neuron circuit. The charge storage properties of the device mimic the integrate function of biological neurons without a large membrane capacitor, reducing the PF neuron area by about 17 times compared to that of a conventional neuron. We demonstrate the successful operation of a dense multiple PF neuron system with reset and lateral inhibition using a common self-controller in a neuron layer through simulation. With the multiple PF neuron system and the synapse array, on-line unsupervised pattern learning and recognition are successfully performed to demonstrate the feasibility of our PF device in a neural network.

Modeling of ΔIBL due to random telegraph noise with considering bit-line interference in NAND flash memory

Bit-line (BL) current fluctuation (?IBL?=?high IBL???low IBL) of the trap position is modeled as a parameter of the state (program or erase) of adjacent BL cells which affects the current density distribution appreciably. To model ?IBL, we extracted the integrated electron current density (J0?=?f(z)) and the electric blockade length (Lt) by considering the effect of the interference of adjacent cells. A characteristic function (g(z)) which has a Gaussian functional form is defined based on Lt and the trap position within the tunneling oxide from the channel surface (xT). Finally, ?IBL is extracted through the integration of f(z) and g(z). Our model predicts accurately the ?IBL with the trap position as a parameter of the state of BL cells, showing good agreement with 3D simulation data.