Chan Hyeong Park

Modeling of thermal noise in short-channel MOSFETs at saturation

Abstract An analytical formula of excessive thermal noise in short-channel MOSFETs at saturation is developed following the approach used for GaAs JFET or MESFET by Statz, Haus, and Pucel. It is taken into account that the noise generated in the velocity saturation region comes from randomly generated dipole layers which propagate toward the drain contact without relaxation. Simulation of the derived formula shows that the velocity saturation region plays a crucial role in determining excessive thermal noise in short-channel MOSFETs. The proposed thermal noise formula is confirmed by the comparison to the published experimental results of high-frequency noise in the short-channel nMOSFET of channel length 0.7 μm at saturation.

Statistical analysis of random telegraph noise in CMOS image sensors

We propose a statistical method to predict the dark random readout noise in CMOS image sensors. First, we calculate the dark random noise originated from oxide traps present in the source-follower MOSFET. Statistical variation in the dark noise is associated with the random variation of the oxide defects in the CMOS image sensor cells in both the energy and space domain. Considering the effect of the correlated double sampling, we define the dark random noise as the standard deviation in the time domain and analyze the effect of the MOSFET width and length variations and temperature on its dark random noise.

Physics-Based Analysis and Simulation of Phase Noise in Oscillators

A technology computer-aided design framework that can predict the phase noise spectrum of an oscillator using nonlinear perturbation analysis is developed. The device-circuit mixed-mode simulation technique based upon the shooting-Newton method is exploited to evaluate the periodic steady-state solution of the oscillator. The influence of noise sources inside the devices on the phase deviation is calculated in an efficient and accurate way using the perturbation projection vector. The period jitter and the output power spectrum can be easily obtained in this framework. As an application, the output power spectrum of a CMOS LC voltage-controlled oscillator is calculated

Physics-Based Analysis and Simulation of

This paper presents a study on 1/f noise in MOSFETs under large-signal (LS) operation, which is important in CMOS analog and RF integrated circuits. The flicker noise is modeled with noise sources as a perturbation in the semiconductor equations employing McWhorters oxide-trapping model and Hooges empirical 1/f noise model. Numerical results are shown for 1/f noise in the MOSFET in both small-signal operation and periodic LS operation. It is shown that McWhorters model does not give any significant 1/f noise reduction when the oxide traps are distributed uniformly in energy and space. In contrast, Hooges model gives almost 6-dB 1/f noise reduction as the gate off-voltage decreases below the threshold voltage. It is found that both models fall short of explaining the noise reduction by more than 6 dB, as observed experimentally in the literature. However, when only one active oxide trap is considered, which generates random telegraph signal (RTS) in drain current, the LS operation gives more than 6-dB low-frequency RTS noise reduction.

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A general TCAD framework for the large-signal (LS) noise analysis of RF CMOS circuits has been developed employing an efficient preconditioner for generalized minimal residual (GMRES) method. In this framework the influence of the noise sources inside the devices on the output noise of the circuit is calculated using the conversion Greens function (CGF) technique. We expect that the newly-developed TCAD framework can provide a physics-based and efficient LS noise analysis under a mixed device-circuit environment. As an application, noise behaviors of a single-balanced down-conversion mixer has been simulated using this framework.

Noise in MOSFETs Under Large-Signal Operation

We show that carbon nanotube sensors with gold particles on the single-walled carbon nanotube (SWNT) network operate as Schottky barrier transistors, in which transistor action occurs primarily by varying the resistance of Au-SWNT junction rather than the channel conductance modulation. Transistor characteristics are calculated for the statistically simplified geometries, and the sensing mechanisms are analyzed by comparing the simulation results of the MOSFET model and Schottky junction model with the experimental data. We demonstrated that the semiconductor MOSFET effect cannot explain the experimental phenomena such as the very low limit of detection (LOD) and the logarithmic dependence of sensitivity to the DNA concentration. By building an asymmetric oncentricelectrode model which consists of serially-connected segments of CNTFETs and Schottky diodes, we found that for a proper explanation of the experimental data, the work function shifts should be ~ 0.1 eV for 100 pM DNA concentration and ~ 0.4 eV for 100 μM.

A Physics-Based TCAD Framework for the Noise Analysis of RF CMOS Circuits under the Large-Signal Operation

1/f noise in MOSFETs under large-signal excitation, which is important in CMOS analog and RF circuits, is modeled as a perturbation in the semiconductor equations employing the oxide-trapping model. The oxide-trapping model for a MOSFET in periodic large-signal operation shows that 1/f noise reduces more than the small-signal noise model predicts as the gate OFF voltage decreases further below the threshold voltage.

Analysis of Sensing Mechanisms in a Gold-Decorated SWNT Network DNA Biosensor

Modeling capabilities and considerations to achieve a unified reliability model (URM) are addressed. The causes of the trap generation and their effects on the device characteristics serve the unified reliability model. A strategy taken in the SNU group based on the CLESICO system is introduced, where the hydrogen transport and trapping in the gate dielectric to form active carrier trapping sites and their effects on the device characteristics such as the current degradation are treated in a systematic and statistical manner. The treatment of the discrete nature of the trapped charges to model the RTS and 1/f noises are also introduced.

Physics-Based Simulation of 1/f Noise in MOSFETs under Large-Signal Operation

This paper presents the governing equations of the Green’s functions for the short-circuit terminal noise currents of semiconductor devices under the drift-diffusion scheme. Using these equations, the Nyquist theorem is derived for multiterminal bipolar semiconductor devices at nonzero frequencies with generation-recombination processes considered. It is explicitly shown that generation-recombination noise sources play an essential role in canceling out part of terminal noise contributions from diffusion noise sources to finally obtain the equilibrium thermal noise.

A unified approach for the reliability modeling of MOSFETs

짧은 채널 길이와 긴 채널 너비를 갖는 MOSFET은 너비 방향으로 불균일한 채널 불순물 농도를 갖게 되며, 이에 의해 너비 방향으로 각 지점에서의 MOSFET 채널은 서로 다른 값의 문턱전압을 갖게 된다. 본 논문에서는 넓은 폭의 MOSFET을 문턱전압이 정규분포의 변동성을 갖는 W/L=1인 단위 MOSFET의 병렬연결로 모델링하여 SPICE 모델 파라미터를 활용한 시뮬레이션 기법으로 폭의 길이에 따른 전류-전압곡선의 특성을 분석한다. 이 분석을 통해 MOSFET의 폭이 넓어질수록 문턱전압이 낮아지고 문턱전압 이하 영역에서의 전류곡선의 지수기울기가 감소하는 것을 파악한다. 또한 문턱전압 부근과 그 이하 영역에서 MOSFET 너비에 따른 전류의 분포를 예측함으로써 전류 매칭에 유리한 MOSFET의 크기와 바이어스 조건을 제시한다. 이러한 분석 결과는 문턱전압의 변동성을 잘 견디는 초저전압 동작 아날로그 회로의 설계에 유용하게 활용될 것으로 기대된다.