Jonggook Kim

Footprint design optimization in SiGe BiCMOS SOI technology

Footprint design in SiGe BiCMOS SOI technology is described in this paper to improve device performance matrix. The safe operating area (SOA) for a SiGe hetero-junction bipolar transistor (HBT) fabricated on silicon on insulator (SOI) is significantly improved as the footprint area increases. The Early voltage for SiGe HBT on SOI at medium-high bias range also increases substantially with footprint area increase. Peak fT and noise figure improves slightly with footprint, and peak fMAX improves slightly then decreases significantly at very large footprint area. A generic tube-area-limited thermal resistance model for BiCMOS devices on SOI is also proposed.

Safe Operating Area from Self-Heating, Impact Ionization, and Hot Carrier Reliability for a SiGe HBT on SOI

A unified electro-thermal safe operating area (SOA) expression is proposed in this paper to evaluate self heating, impact ionization, and hot carrier (HC) degradation effects simultaneously in a full range of bipolar transistor operation. This SOA is demonstrated by experiments for a SiGe hetero-junction bipolar transistor (HBT) fabricated on silicon on insulator (SOI) by extracting principle parameters from discrete transistors and current mirrors. Also, time dependent reliability tests have been fulfilled for several meaningful bias points within this SOA at the fixed VBE and VCE. Avalanche induced HC injection was another important factor to restrict device performance. Finally, the modified electro-thermal SOA by HC reliability is suggested here.

Reliability Challenges in Analog and Mixed Signal Technologies

Unique analog product application requirements such as high speed, low noise, low power, high precision and high voltage demand complex analog process technologies. This complexity poses several reliability challenges that are specific to each technology. In this paper some of the key reliability mechanisms in most common analog process technologies are highlighted. To meet broad range of analog IC reliability requirements, in-depth device reliability characterization is essential besides the traditional process reliability qualification.

An experimental investigation of RF safe-operating-area (SOA) in SiGe HBTs on SOI

The RF safe-operating-area of a variety of both bulk and thick-film SOI SiGe HBTs SiGe has been investigated using DC and pulsed-mode output characteristics, as well as RF gain and linearity measurements. SOI SiGe HBTs are found to suffer more from self-heating than bulk devices under DC operating conditions, as expected, due to their naturally higher thermal resistance. However, in terms of RF performance, operation of SiGe HBTs on SOI beyond the traditionally-defined safe-operating-area showed only minor degradation in RF metrics, and improved RF linearity. High-injection phenomena are suggested as possible explanations for the observed suppression of self-heating-induced degradation and thermal runaway in these SiGe HBTs on SOI operating under RF operating conditions.

The current mirror thermal characterization method and its implementation in a power SOI BJT process

A new current mirror method is described that can be used to evaluate thermal issues in silicon-on-insulator (SO0 bipolar junction transistors (BJTs). This method is compared to conventional transistor level techniques ond is shown to significantly improve safe operating area (SOA) measurement sensitiviq. Unlike conventional metho&, the current mirror method can provide quantitative analysis of the BJTs thermal instabiliQ over a wide power range, even in the apparent SOA of the device. Also, this method can predict and evaluate SOA with respect to emitter ballast resistance and current crowding.

A current mirror method for thermal instability of SOI BJT

A current mirror method is propose in this paper to evaluate thermal issues in silicon-on -insulator (SOI) bipolar junction transistors (BJTs) accompanied by conventional transistor level methods. It can provide quantitative analysis for thermal instability in the whole range of power, even in the safe operating area (SOA) derived from conventional transistor methods. The change of SOA is also investigated by current mirror with an emitter degeneration resistor and various thermal resistances using a VBIC model.

Advantages of SiGe-pnp over Si-pnp for analog and RF enhanced CBiCMOS and Complementary Bipolar design usage

The evolution of silicon and silicon-germanium pnp transistors is reviewed in this paper. The motivation for SiGe-pnp transistors in Complementary Bipolar (CBi) and CBiCMOS is discussed with a view on device parametric parameters that help gage the usefulness of these devices in analog and RF design. We review the basic process architectures and process building blocks for CBiCMOS. SiGe-pnp versus Si-pnp performance metrics are highlighted followed by a discussion on circuit blocks that benefit from having near matched complementary bipolar transistors.

Copper - top interconnect reliability for mixed signal applications

The equation of resistance drift governing oxidation is derived in this paper for Copper-Top (Cu-Top) interconnects to assess reliability of Cu-Top. Our equation is not only demonstrated by thermal storage tests at various temperatures but also characterized by dependence of time, temperature, metal width, and additional dielectric & conductive layers over Cu-Top. As a result, this approach enables the prediction of the accumulated resistance drift under any conditions for a lifetime operation.