Jongwon Yun

300 GHz Integrated Heterodyne Receiver and Transmitter With On-Chip Fundamental Local Oscillator and Mixers

A 300 GHz integrated heterodyne receiver and transmitter for wideband communication and imaging applications have been developed in a 250 nm InP double-heterojunction bipolar transistor (DHBT) process. The receiver integrates a 300 GHz RF amplifier with a balun, a down-conversion mixer with an IF amplifier, and a local oscillator, all on a single chip. The transmitter is composed of the identical circuit blocks of RF amplifier and oscillator in addition to an up-conversion mixer. Compared to previous integrated receivers and transmitters reported at above 200 GHz, the proposed work includes the on-chip local oscillator and mixers operating at a fundamental mode. This simplifies the system architecture, thus not only reducing the chip area and DC consumption but also improving the RF performance such as high conversion gain, low spurious levels, and low noise figure. The receiver exhibits a peak conversion gain of 26 dB at 298 GHz, 3-dB bandwidth of 20 GHz, and noise figure of 12.0-16.3 dB at IF frequency from 1.1 to 7.7 GHz. The transmitter exhibits peak conversion gain of 25 dB, 3 dB bandwidth of 18 GHz, and output power of -2.3 dBm. The DC power consumption of the receiver and transmitter are 482 and 452 mW, respectively.

300-GHz InP HBT Oscillators Based on Common-Base Cross-Coupled Topology

Two fundamental-mode oscillators operating around 300 GHz, a fixed-frequency oscillator and a voltage-controlled oscillator (VCO), have been developed in this work based on a 250-nm InP heterojunction bipolar transistor (HBT) technology. Both oscillators adopted the common-base configuration for the cross-coupled oscillator core, providing higher oscillation frequency compared to the conventional common-emitter cross-coupled topology. The fabricated fixed-frequency oscillator and the VCO exhibited oscillation frequency of 305.8 GHz and 298.1-316.1 GHz (18-GHz tuning range) at dc power dissipation of 87.4 and 88.1 mW, respectively. The phase noise of the fixed-frequency oscillator was measured to be -116.5 dBc/Hz at 10 MHz offset. The peak output power of 5.3 dBm (3.8% dc-to-RF efficiency) and 4.7 dBm (3.2% dc-to-RF efficiency) were respectively achieved for the two oscillators, which are the highest reported power for a transistor-based single oscillator beyond 200 GHz.

A 120 GHz Voltage Controlled Oscillator Integrated with 1/128 Frequency Divider Chain in 65 nm CMOS Technology

A 120 GHz voltage controlled oscillator (VCO) with a divider chain including an injection locked frequency divider (ILFD) and six static frequency dividers is demonstrated using 65-nm CMOS technology. The VCO is designed based on the LC cross-coupled push-push structure and operates around 120 GHz. The 60 GHz ILFD at the first stage of the frequency divider chain is based on a similar topology as the core of the VCO to ensure the frequency alignment between the two circuit blocks. The static divider chain is composed of D-flip flops, providing a 64 division ratio. The entire circuit consumes a DC power of 68.5 mW with the chip size of 1385 × 835 μm².

A 248–262 GHz InP HBT VCO with Interesting Tuning Behavior

A fundamental-mode common-base voltage-controlled oscillator (VCO) based on 250-nm InP heterojunction bipolar transistor (HBT) technology is reported. The VCO, which employs varactors implemented by connecting the base and emitter of npn transistors as tuning components, shows a tuning range of 247.8-262.2 GHz. The output power is greater than 0 dBm over the entire tuning range, and dissipated dc power is around 85 mW. An unexpected tuning behavior was observed, which was shown to arise from the internal parasitic base inductance of the transistors used for varactors in this work.

Two 320 GHz Signal Sources Based on SiGe HBT Technology

Two 320 GHz signal sources, a push-push oscillator and an integrated oscillator-doubler, based on a 130 nm SiGe HBT technology are reported. Both signal sources adopt a common-base cross-coupled topology as an oscillator core. The doubler employs a Gm-boosting technique for improved conversion loss. The push-push oscillator exhibits an output power of -6.3 dBm and a phase noise of -96.6 dBc/Hz at 10 MHz offset. The output power and the phase noise of the integrated oscillator-doubler are 1.6 dBm and -94.7 dBc/Hz at 10 MHz offset, respectively. They dissipate dc power of 101.2 mW and 197.4 mW, leading to DC-to-RF efficiency of 0.2 % and 0.7 %, respectively.

A 280-GHz 10-dBm Signal Source Based on InP HBT Technology

A 280-GHz high-power signal source has been developed in this work based on a 250-nm InP heterojunction bipolar transistor (HBT) technology. The fabricated signal source is composed of two in-phase locked common-base cross-coupled oscillators, the output of which is on-chip combined by a pair of rat-race couplers and a Wilkinson power combiner for enhanced output power. The developed signal source exhibits an oscillation frequency of 276.4 GHz and a phase noise of–89 dBc/Hz at 1 MHz offset. The output power of the signal source is measured to be 10 dBm (10 mW), while consuming a dc power of 196 mW (dc-to-RF efficiency of 5.1%).

A 310–340-GHz Coupled-Line Voltage-Controlled Oscillator Based on 0.25-

A THz voltage-controlled oscillator (VCO) has been developed in this work based on a 0.25- μm InP heterojunction bipolar transistor (HBT) technology. The cross-coupled push-push oscillator adopted a novel coupled-line topology, in which the DC blocking capacitors and the load inductance are replaced by a pair of coupled-lines to improve the oscillation frequency and reduce the circuit area. Also, a base bias tuning was employed for effective oscillation frequency tuning. The circuit exhibited the voltage tuning from 309.5 GHz to 339.5 GHz, leading to a tuning range of 30 GHz. The maximum output power was -6.5 dBm at 334 GHz, achieved with a dc power consumption of 13.5 mW. Measured phase noise was -86.55 at 10-MHz offset. The circuit occupies only 0.014 mm 2 excluding the probing pads.

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Two 122-GHz phase-locked loops (PLLs) have been developed based on a 65-nm Si CMOS technology, and their performances are compared. For the first PLL, a voltage-controlled oscillator (VCO) with a frequency doubler embedded in the oscillator core was employed (PLL1), while the second PLL employs a push-push VCO (PLL2). The output powers of PLL1 and PLL2 were -8.6 and -21.9 dBm near 122 GHz, obtained from dc power dissipation of 82.9 and 87.7 mW, respectively. The respective locking ranges were measured to be 121.9-122.2 and 122.7-122.9 GHz for PLL1 and PLL2. The in-band phase noises were -59.2 and -60.1 dBc/Hz at 10-kHz offset, and the out-band phase noises were -102.4 and -99.5 dBc/Hz at 10-MHz offset for PLL1 and PLL2, respectively. The chip sizes were 1000 × 760 μm2 (PLL1) and 1300 × 840 μm2 (PLL2) including probing pads.

m InP HBT Technology

This work describes the development of a D-band (110?170 GHz) signal source based on a SiGe BiCMOS technology. This D-band signal source consists of a V-band (50?75 GHz) oscillator, a V-band amplifier, and a D-band frequency doubler. The V-band signal from the oscillator is amplified for power boost, and then the frequency is doubled for D-band signal generation. The V-band oscillator showed an output power of 2.7 dBm at 67.3 GHz. Including a buffer stage, it had a DC power consumption of 145 mW. The peak gain of the V-band amplifier was 10.9 dB, which was achieved at 64.0 GHz and consumed 110 mW of DC power. The active frequency doubler consumed 60 mW for D-band signal generation. The integrated D-band source exhibited a measured output oscillation frequency of 133.2 GHz with an output power of 3.1 dBm and a phase noise of -107.2 dBc/Hz at 10 MHz offset. The chip size is 900 × 1,890 μm², including RF and DC pads.

Two 122-GHz Phase-Locked Loops in 65-nm CMOS Technology

A review on the Si-based D-band frequency circuits recently developed in Korea University is presented. Low power mixers operating near 140 GHz have been implemented based on SiGe BiCMOS and Si CMOS technologies. A couple of injection-locked frequency dividers with SiGe BiCMOS technology working around 140 GHz, which are intended for wide locking range, have also been fabricated.