Joo-Nam Kim

CHARACTERIZATION OF METAL-FERROELECTRIC-SEMICONDUCTOR STRUCTURE USING FERROELECTRIC POLYMER POLYVINYLIDENE FLUORIDE-TRIFLUOROETHYLENE (PVDF-TrFE) (51/49)

ABSTRACT In this work, we fabricated metal-ferroelectric-semiconductor (MFS) diodes with polyvinylidene fluoride-trifluoroethylene (PVDF-TrFE) (51/49) thin films for application to one transistor-type (1T-type) ferroelectric random access memories (FeRAMs). The thin films, with various thicknesses, were prepared on a silicon substrate by using a spin-coating method. The β-phase crystallinity and the grain size of the PVDF-TrFE increased as the film-thickness increased. Typical ferroelectric hysteresis loops were obtained from the capacitance-voltage (C-V) curves. These loops might be considered to be due to the ferroelectric nature of the PVDF-TrFE films. The values of the memory window width for 50-nm-, 150-nm-, and 350-nm-thick PVDF-TrFE films were about 1.4, 2.0, and 3.5 V for a bias sweeping from −5 V to 5 V, respectively. The values of the leakage current density, at a sweeping range of ± 5 V, were about 2.7 × 10−5 A/cm2, 1.1 × 10−5 A/cm2, and 5.6× 10−6 A/cm2 for 50-nm-, 150-nm-, and 350-nm-thick films, respectively. These results are useful and promising for realizing 1T-type FeRAMs operating at a low voltage.

Precursor dependent properties of Ba/sub 1-x/Sr/sub x/TiO/sub 3/ thin films fabricated by sol-gel method

Thin films of barium strontium titanate, Ba/sub 1-x/Sr/sub x/TiO/sub 3/, were deposited on Si and ITO/glass substrates with 200/spl sim/300 nm thickness by sol-gel method. The precursor solution of BST was prepared by mixing the 0.2 M precursor solutions of BaTiO/sub 3/ and SrTiO/sub 3/ with proper molar ratio. The X-ray diffraction (XRD) patterns show characteristic peaks with weak and broad features indicating that the polycrystalline BST film has poor crystallinity. The grain size and the surface morphology of the films were investigated by atomic force microscope (AFM). Especially, dependence of the film structures on the treatments of precursor solution such as hydrolysis and modification with acetic acid was investigated. The I-V (current-voltage) characteristics of the films was also dependent on the precursor structure. The C-V (capacitance-voltage) behavior of the films with MIS (metal-insulator-semiconductor) and MIM (metal-insulator-metal) structures were studied. Also, dielectric permittivity which was very strongly dependent on the crystallinity of the films was discussed in conjunction with precursor structures.

Fabrication and Characterization of MFIS-FET Using Au/BLT/LZO/Si Structures

We fabricated the n-channel metal-ferroelectric-insulator-semiconductor field-effect transistor (MFIS-FET) using an Au/(Bi,La) 4 Ti 3 O 12 /LaZrO x /Si(100) gate structure. We observed that the LaZrO x thin film had the equivalent oxide thickness value of around 8.7 nm. The 420-nm-thick (Bi,La) 4 Ti 3 O 12 film on a LaZrO x /Si structure, showed a good ferroelectric property and had the width of the memory window of 1.2 V for a bias voltage sweeping of ± 7 V. The drain current-gate voltage (I D -V G ) of an Au/(Bi,La) 4 Ti 3 O 12/ LaZrO x /Si(100) MFIS-FET showed threshold voltage shift (memory window width) owing to the ferroelectric (Bi,La) 4 Ti 3 O 12 film. The drain current-drain voltage (I D -V D ) characteristic curves exhibit typical n-channel field-effect transistor current-voltage characteristic. However, relatively large leakage current observed in the I D –V G and the I D –V D characteristic curves, might be caused by the high density of pores in the BLT film.

Thin Film Properties of Sol-Gel Derived High-K Lanthanum-Doped Zirconium Oxides

The lanthanum zirconium oxide thin films were prepared on p-type Si(100) by a sol-gel wet method. Sol-gel solutions of La x Zr 1 − x O y with La atomic fractions of x = 0, 0.05, 0.1, 0.3, and 0.5 were synthesized for film deposition. Thin films were characterized using x-ray diffraction (XRD), atomic force microscopy (AFM), and scanning electron microscopy (SEM). Electrical property characterization was performed with metal-insulator-semiconductor (MIS) structures through capacitance-voltage (C-V) and current density-voltage (J-V) measurements. The thin film showed a good surface morphology. Equivalent oxide thickness (EOT) values of 30 nm-thick La x Zr 1 − x O y thin films annealed at 700°C were about 8.8–10.5 nm. C-V measurements revealed that curves shifted left when the film has a larger content of La or was annealed at a higher temperature. The leakage current density was below 1.0 × 10−6 A/cm 2 at 1 MV/cm for all samples.

Effect of Thickness on Electrical Properties of PVDF-TrFE (51/49) Copolymer

In this study, polyvinylidene fluoride-trifluoroethylene (PVDF-TrFE) in the composition from 51/49, was deposited on platinum for a metal-ferroelectric-metal structure. From XRD patterns, the 70 nm- and 140 nm-thick PVDF-TrFE films showed the intensity peak of near connected to a ferroelectric phase. Moreover, the thicker film indicated the higher intensity than thinner one. The difference of the remanent polarization (2Pr) at 0 V is decreased gradually from 10.19 to as the thickness decrease from 140 to 70 nm. However, when the thickness decreased to 50 nm, the 2Pr rapidly drop to so the minimum critical thickness might be at least 70 nm for device. Both different thickness films, 70 and 140 nm, indicated that the characteristic of current density-voltage was measured for below 15 V and the thicker film maintained relatively lower current density than thinner one. From these results, we can expect that the electrical properties for the devices particularly ferroelectric thin film transistor using PVDF-TrFE copolymer were able to be on the trade-off relationship between the remanent polarization with the bias voltage and the leakage current.

Structural and Electrical Properties of Ferroelectric-Gate Field-Effect-Transistors Using Au/(Bi,La) 4 Ti 3 O 12 /SrTa 2 O 6 /Si Structures

We fabricated the ferroelectric-gate field effect transistors (Fe-FETs) using a metal-ferroelectric-insulator-semiconductor (MFIS) structure as a gate configuration using (Bi,La)4Ti3O12 (BLT) and SrTa2O6 (STA) thin films. From the capacitance-voltage (C-V) measurements for MFIS capacitors, a hysteric shift with a clockwise direction was observed and the memory window width was about 1.5 V for the plusmn5 V bias sweep. The leakage current density was as low as 1x10-7 A/cm2 at 5 V. From drain current-gate voltage characteristics of the fabricated Fe-FETs, the obtained threshold voltage shift (memory window) of the device was about 0.5 V due to the ferroelectric nature of BLT film. The drain current-drain voltage characteristics of the fabricated FeFETs showed typical n-channel FETs characteristics.

Evolution of Ferroelectric and Antiferromagnetic Phases of TbMn2O5 Under High Magnetic Field up to 45 T

We determine high magnetic field (B//a) vs temperature phase diagram of TbMn2O5 by measurements of dielectric constant (ϵ//b) and magnetization under static and pulsed B up to 45 T, and pyroelectric/magnetoelectric currents up to 9 T. Our results reveal that a ferroelectric (FE) transition temperature at T C = 38 K at B = 0 T changes little under B up to 33 T, while incommensurate antiferromagnetic phase, characterized as increased ϵ and negative polarization below 25 K at B = 0 T, becomes unstable above B = ∼20 T at low temperatures. Furthermore, a positive FE polarization component, coined with a Tb f-spin ordering below ∼15 K at B = 0 T, abruptly disappears with Tb f-spin reorientation under B ≤ ∼2 T. Determined phase diagram shows that both magnitude of FE polarization and ϵ value are sensitively dependent on the evolution of magnetic order parameters of both Mn-d and Tb-f spins tuned by high magnetic fields.

Electrical Properties of Au/(Bi,La)4Ti3O12/Pt/SrTa2O6/Si Field-Effect Transistor

The metal-ferroelectric-metal-insulator-semiconductor field-effect transistor using the Au/(Bi,La)4Ti3O12(BLT)/Pt/SrTa2O6(STA)/Si structure is prepared. The STA and BLT films are spun-casted by the sol-gel method. The equivalent oxide thickness value of the STA thin film is 5.2 nm and negligibly small hysteresis loops have been observed for the Au/STA/Si structure. The leakage current density is lower than 10− 7 A/cm2 under 6 V. The remanent polarization of the 420 nm-thick BLT film was 35.2 μ C/cm2 at 450 kV/cm. The Au/BLT/Pt/STA/Si MFMIS-FET was fabricated with different area ratio (AI/AF) from 1 to 8. From the drain current–gate voltage characteristics at the drain voltage of 0.2 V, the memory window is only 0.5 V for the device with AI/AF = 1 but it is increased to 1.8 V as the AI/AF is increased to 8. For the AI/AF ratio of 4, the drain current of 1.2× 10− 5 A rapidly drops after 1.4× 104 s to 4× 10− 6 A. The retention time improves as the AI/AF ratio is increased to 8 and it has been found to drop after 8.5× 104 seconds.