Joo-Sung Park

High Order Modulation in Faster-Than-Nyquist Signaling Communication Systems

In this paper we investigate the highly bandwidth-efficient Faster-than-Nyquist (FTN) signaling scheme under high order modulations. The FTN system is an emerging technology which has drawn attention in the contemporary spectrum-saving communication environment. Since FTN traditionally achieves high bandwidth efficiency through increased baud-rate, binary modulation is assumed in most research of FTN. The contribution of this paper lies in the extension into high order modulations and its assessment. This enables the communication systems to achieve higher data rates for the same bandwidth and receiver complexity than binary Nyquist signaling systems. Moreover, it is shown that an additional efficiency gain can be achieved by replacing the LDPC codes from the DVB-S2 standard by new optimized quasi-cyclic (QC) LDPC codes whose parameters are matched with FTN signaling.

Sparse MAP equalizers for turbo equalizations

The turbo equalization scheme provides nearly optimal performance, but when it is employed in sparse multipath channel environments, the equalizer complexity can prohibit its use. In this paper, we develop a parallel trellis n-tap soft-input soft-output maximum a posteriori (MAP) equalizer which can consider n dominant taps of sparse channels with reasonable complexity. It is shown that turbo equalization employing the n-tap MAP equalizer can nearly achieve the asymptotic performance of the optimal maximum likelihood (ML) detector for the combined channel encoder and intersymbol interference (ISI) channel assuming perfect ISI cancellation. It is also shown that increasing n has favorable effects on the convergence of turbo equalizations employing n-tap MAP equalizer by EXIT chart analysis.

Advanced Preamble Transmit Diversity of Polarized DVB-T2 MISO System Using Hybrid Differential Modulation

The digital video broadcasting - second generation terrestrial (DVB-T2) standard has adopted a preamble called P1 symbol to achieve the fast time and frequency synchronization. The P1 symbol also carries basic transmission parameters of DVB-T2 system, such as fast Fourier transform size, guard interval size and transmission type - single input single output or multiple input single output, etc. In this paper, we propose an improved preamble which is modulated by a novel hybrid differential modulation scheme that can provide transmit diversity gain to achieve the same performance of coherent transmission. The proposed preamble has demonstrated a significantly improved signaling error rate performance over various channel conditions compared to the conventional P1 symbol in DVB-T2.

Overcoming DRAM scaling limitations by employing straight recessed channel array transistors with uni-axial and [100] uni-plane channels

Recessed channel array transistors (RCAT) for DRAM are implemented with <100> uni-axial and {100} uni-plane channels for the first time. It is found that this structure improves the cell transistor drivability by 25% with the improvement being more effective in straight shape active RCAT than the diagonal shape active RCAT due to the larger dimension of the horizontal <100> axial channel in the {100} plane. Enhanced RCAT drivability improves tRDL (allowed time interval between data-in and word-line precharge) and retention time, which allows for lowering the gate voltage over-drive (VPP) in DRAM operation. This possibility provides a breakthrough in reliability limitations and leads to better performance in nano-scaled DRAM

Lateral-Extended (LatEx.) active for improvement of data retention time for sub 60nm DRAM era

A new active isolation structure, LatEx (lateral-extended) active, which exploits recess channel transistors, is proposed. By realizing the LatEx active, data retention time enhancement was successfully achieved in 60 nm technology node DRAM by virtue of reduced source/drain area and improved subthreshold slope due to decreased cross-sectional area of top trench profile and vertical bottom trench process. In this paper, LatEx active coupled with SRCAT is proved to be suitable for sub 60 nm DRAM cell array transistor technology.

A 0.11 /spl mu/m DRAM technology for 4Gb DRAM and beyond

A 1.8 V 650 mm/sup 2/ 4Gb DRAM fabricated with 0.10 /spl mu/m/sup 2/ cell size has been successfully developed using 0.11 /spl mu/m DRAM technology. Well-proven KrF lithography has been extended with various resolution enhancement techniques for 0.11 /spl mu/m DRAM technology. 80 nm array transistor and sub-80 nm memory cell contact, which are the smallest array transistor ever reported, are successfully developed for high functional yield as well as high chip performance. In addition, many novel DRAM technologies are developed and will have strong influence on the future DRAM integration. These are novel oxide gap-filling, W-bit line with stud contact for borderless metal contact, line-type storage node selfaligned contact (SAC), mechanically stable metal-insulator-silicon (MIS) capacitor and CVD Al process for metal interconnections.

Study on channel deformation in the GaAlAs/GaAs V‐channeled substrate inner stripe lasers: Contamination and growth profile

A study on channel deformation in the GaAlAs/GaAs V‐channeled substrate inner stripe (VSIS) laser is presented. The deformation of the chemically etched V‐channel is achieved by two independent mechanisms, i.e., the mass transport and melt etch increasing the effective channel width, one of the most important parameters to control device characteristics. However, contrary to widely accepted conception, the melt etch plays a relatively minor role in channel deformation, compared to the mass transport. We have also found that both the mass transport and melt etch depend strongly on hardening of sample surface, which in turn depends on the system condition.